IDT
PES24N3A User Manual
3
April 10, 2008
Notes
The ordering of bytes within words is referred to as either “big endian” or “little endian.” Big endian
systems label byte zero as the most significant (leftmost) byte of a word. Little endian systems label byte
zero as the least significant (rightmost) byte of a word. See Figure 2.
Figure 2 Example of Byte Ordering for “Big Endian” or “Little Endian” System Definition
Register Terminology
Software in the context of this register terminology refers to modifications made by PCIe root configura-
tion writes, writes to registers made through the slave SMBus interface, or serial EEPROM register initial-
ization. See Table 2.
Type
Abbreviation
Description
Hardware Initialized
HWINIT
Register bits are initialized by firmware or hardware mechanisms
such as pin strapping or serial EEPROM. (System firmware hard-
ware initialization is only allowed for system integrated devices.)
Bits are read-only after initialization and can only be reset (for
write-once by firmware) with reset.
Read Only and Clear
RC
Software can read the register/bits with this attribute. Reading the
value will automatically cause the register/bit to be reset to zero.
Writing to a RC location has no effect.
Read Clear and Write
RCW
Software can read the register/bits with this attribute. Reading the
value will automatically cause the register/bits to be reset to zero.
Writes cause the register/bits to be modified.
Reserved
Reserved
The value read from a reserved register/bit is undefined. Thus,
software must deal correctly with fields that are reserved. On
reads, software must use appropriate masks to extract the defined
bits and not rely on reserved bits being any particular value. On
writes, software must ensure that the values of reserved bit posi-
tions are preserved. That is, the values of reserved bit positions
must first be read, merged with the new values for other bit posi-
tions and then written back.
Read Only
RO
Software can only read registers/bits with this attribute. Contents
are hardwired to a constant value or are status bits that may be
set and cleared by hardware. Writing to a RO location has no
effect.
Read and Write
RW
Software can both read and write bits with this attribute.
Table 2 Register Terminology (Sheet 1 of 2)
0
1
2
3
bit 0
bit 31
Address of Bytes within Words: Big Endian
3
2
1
0
bit 0
bit 31
Address of Bytes within Words: Little Endian
Summary of Contents for 89HPES24N3A
Page 10: ...IDT Table of Contents PES24N3A User Manual iv April 10 2008 Notes...
Page 12: ...IDT List of Tables PES24N3A User Manual vi April 10 2008 Notes...
Page 14: ...IDT List of Figures PES24N3A User Manual viii April 10 2008 Notes...
Page 18: ...IDT Register List PES24N3A User Manual xii April 10 2008 Notes...
Page 64: ...IDT Link Operation PES24N3A User Manual 4 8 April 10 2008 Notes...
Page 88: ...IDT Power Management PES24N3A User Manual 7 4 April 10 2008 Notes...
Page 160: ...IDT Configuration Registers PES24N3A User Manual 9 66 April 10 2008 Notes...