IDT 5P49V6965, Register Descriptions And Programming Manual

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Output Divider Integer Settings ( Table 51 through Table 58 )
Output divider's integer part consists of 12 bits spread on 2 consecutive registers. The 4 dividers are assigned to respectively to each
output 1, 2, 3, 4.
Table 51. RAM2 – 0x2D: Output Divider 1 Integer Part
Bits Default Value Name Function
D7 0
OD1_intdiv[11:4] Output divider 1 integer part has 12 bit spread over 2 registers x2D and x2E.
D6 0
D5 0
D4 0
D3 0
D2 0
D1 0
D0 0
Table 52. RAM2 – 0x2E: Output Divider 1 Integer Part
Bits Default Value Name Function
D7 1
OD1_intdiv[3:0] Output divider 1 integer part has 12 bit spread over 2 registers x2D and x2E.
D6 1
D5 1
D4 0
D3 0 unused bits Unused Factory reserved bit.
D2 0 unused bits Unused Factory reserved bit.
D1 0 unused bits Unused Factory reserved bit.
D0 0 unused bits Unused Factory reserved bit.
Table 53. RAM3 – 0x3D: Output Divider 2 Integer Part
Bits Default Value Name Function
D7 0
OD2_intdiv[11:4] Output divider 2 integer part has 12 bit spread over 2 registers x3D and x3E.
D6 0
D5 0
D4 0
D3 0
D2 0
D1 0
D0 0