PEX/PIO/PISO-DA Series Card
Analog Output Boards
User Manual/ Ver. 3.1/ Oct. 2013/ PMH-0010-31/ Page: 62
6.3.3 Aux Data Register
(Read/Write): wBase+3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Aux7
Aux6
Aux5
Aux4
Aux3
Aux2
Aux1
Aux0
When the Aux is used for D/O, the output state is controlled by this register. This register is
designed for feature extension. Therefore, do not use this register.
6.3.4 INT Mask Control Register
(Read/Write): wBase+5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
EN1
EN0
EN0=0
Disable INT0 as an interrupt signal (Default).
EN0=1
Enable INT0 as an interrupt signal
EN1=0
Disable INT1 as an interrupt signal (Default)
EN1=1
Enable INT1 as an interrupt signal
For example:
outportb(wBase+5,0);
/*Disable all interrupt */
outportb(wBase+5,1);
/* Enable interrupt of INT0 */
outportb(wBase+5,2);
/* Enable interrupt of INT1 */
outportb(wBase+5,3);
/* Enable both interrupt channels */
Refer to the following demo programs for more information:
DEMO3.C and DEMO4.C
single interrupt source
DEMO5.C and DEMO6.C
multiple interrupt source
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