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4-5 PORT ALLOCATIONS
4-5-1 CPU (LOGIC UNIT; IC1)
Pin
Port
Description
number
name
Pin
Port
Description
number
name
2
3
4
5
6
7
14
15
19
25
26
28
30
31
32
33
34
43
44
45
46
47
K2
K1
RSSI
VIN
CTONE
RTONE
ESIO
ECK
RESET
POWER
HVDET
CLS
CLIN
CLOUT
PDAUL
PSTB
PCK
UHFC
ANTSW
WFM
AM
NOISE
Input port for the [
∫
], [
√
] switches.
Input port for the [BAND], [V/M],
[MODE] swtiches.
Input port for the RSSI signal from the
FM IF IC (RF unit; IC2, pin 12) to
detect receiving signal strength.
Input port for the power supply volt-
age.
• Input port for the antenna canceller
signal.
• Input port for the WX alert signal.
Input port for the CTCSS decode sig-
nal (67–254.1 Hz).
I/O port for the data signals from/to the
EEPROM (LOGIC unit; IC2, pin 5).
Outputs clock signal to the EEPROM
IC (LOGIC unit; IC2, pin 6).
Outputs reset signal to the CPU
(LOGIC unit; IC1, pin 19).
High: The CPU is reset.
Input port for the [POWER] switch.
Low: [POWER] switch is pushed.
Input port for the external power sup-
ply detecting signal.
Low: While external power supply is
connected.
Outputs clock shift control signal.
High: While clock is shifting.
Input port for the cloning data.
Outputs the cloning data.
Outputs data signal to the PLL IC.
Outputs strobe signals to the PLL IC
(RF unit; IC3, pin 3).
Outputs clock signal to the PLL IC (RF
unit; IC3, pin 4).
Outputs control signal for the UHF
band receiving.
Low: While receiving UHF band.
Outputs the AM bar antenna control
signal.
High: The AM bar ant. is selected.
Outputs control signal for the WFM
circuit.
Low: While receiving WFM mode.
Outputs control signal for the AM cir-
cuit.
Low: While receiving AM mode.
Input port for the SQL detection noise
signal.
48
49
50
51
52
53
54
55
58
59
60
61
62
63
64
65
66
67
68
Outputs the battery charger circuit
control signal.
High: While the battery is charging.
Outputs control signal for the CTCSS
regulator circuit.
Low: While CTCSS is ON.
Outputs control signal for the AF mute
circuit.
High: While muting.
Outputs control signal for the VHF
band receiving.
Low: While receiving VHF band.
Outputs the power swtich control sig-
nal.
Low: IC-R5 is power ON.
Outputs control signal for +3S and
R3V regulator circuits.
Low: Receiving.
Outputs control signal for the 15–30
MHz receiving.
Low: While receiving 15–30 MHz
band.
Outputs beep audio signals.
Outputs control signal for the 1.9–15
MHz receiving.
Low: While receiving 1.9–15 MHz
band.
Outputs control signal for the LO dou-
bler circuits.
Outputs the attenuator control signal.
Low: While attenuator is ON.
Outputs control signal for the VCO
shift circuit.
Outputs control signal for the 1.9–30
MHz receiving.
Low: While receiving 1.9–30 MHz
band.
Outputs control signal for the 0.5–1.9
MHz receiving.
Low: While receiving 0.5–1.9 MHz
band.
Outputs control signal for the 800 MHz
receiving.
Low: While receiving 800 MHz band.
Outputs control signal for the 300 MHz
receiving.
Low: While receiving 300 MHz band.
Outputs control signal for the 1200
MHz receiving.
Low: While receiving 1200 MHz
band.
Outputs control signal for the AF
amplifier regulator.
CHGC
TCON
AMUTE
VHFC
PCON
+3SC
B3C
BEEP
B2C
DBL2
DBL1
ATT
SHIFT
HFC
B1C
800MC
300MC
GC
AFON
