4 - 4
An oscillated signal from the 1st VCO passes through the
buffer amplifiers (IC4, Q43) is applied to the PLL IC (IC3, pin
19) and is prescaled in the PLL IC based on the divided ratio
(N-data). The PLL IC detects the out-of-step phase using the
reference frequency and outputs it from pin 13. The output
signal is passed through the loop filter (Q2, Q45) and is then
applied to the 1ST VCO circuit as the lock voltage.
4-2-2 REFERENCE OSCILLATOR CIRCUIT
(RF UNIT)
The reference oscillator circuit (X1, D18) generates a 19.2
MHz reference frequency which is stabilized within the tem-
perature range –10˚C (+14˚F) to +60˚C (+140˚F). The refer-
ence frequency is applied to the PLL IC (IC3, pin 16) and the
signal is output from the pin 17, and is then applied to the FM
IF IC (IC2, pin 2) via the low-pass filter.
4-2-3 1ST VCO CIRCUIT (RF UNIT)
The oscillated signal is applied to the buffer amplifiers (IC4,
Q40). The amplified signal is applied to the 1st mixer circuit
(IC1) via the RX LO swtich circuit (D42–D44) and doubler cir-
cuit (Q31).
The 1st VCO circuit (Q28, Q30, D54) oscillates 266.85
MHz–380 MHz (normal) and 380 MHz–550 MHz (shifted) by
switching the SHIFT switch (Q29, D46) “High” and “Low”
respectively.
A portion of the signal from IC4 is amplified at the buffer
amplifier (Q43) and is then fed back to the PLL IC (IC3, pin
19) as the comparison signal.
4-2-4 DOUBLER CIRCUIT (RF UNIT)
The doubler circuit composes doubler1, doubler2 and bypass
circuits.
• DOUBLER1 CIRCUIT
The oscillated signal at the VCO circuit is amplified at the
buffer amplifier (IC4), and then applied to the other buffer
amplifier (Q40). The amplified 266.85–400 MHz signal pass-
es through the LO switch (D43), and is then applied to the
doubler circuit (Q31, pin 5). The signal is applied to the 1st
mixer circuit (IC1, pin 3) via the LO switch (D50).
• DOUBLER2 CIRCUIT
The oscillated signal at the VCO circuit is amplified at the
buffer amplifier (IC4), and then applied to the other buffer
amplifier (Q40). The amplified 380.45–549.85 MHz signal
passes through the LO switch (D44), and is then applied to
the doubler circuit (Q31, pin 6). The signal is applied to the
1st mixer circuit (IC1, pin 3) via the LO switch (D47).
• BYPASS CIRCUIT
The oscillated signal at the VCO circuit is amplified at the
buffer amplifier (IC4), and then applied to the other buffer
amplifier (Q40). The amplified 266.85–550 MHz signal
bypasses doubler circuit via the LO switch (D42, D52), and is
then applied to the 1st mixer circuit (IC1, pin 3).
4-2-5 2ND VCO CIRCUIT (RF UNIT)
The 2nd LO circuit generates the 2nd LO frequencies, and
the signals are applied to the 2nd mixer circuit.
The 2nd VCO circuit (Q6, D17, L45, C80, C207, C208) oscil-
lates 247.05 MHz and 286.35 MHz. The oscillated signal is
applied to the 2nd mixer (IC10, pin 3), and is then mixed with
the 1st IF signal.
An oscillated signal from the 2nd VCO passes through the
low-pass filter (C154, C250–C252, L69), and is applied to the
PLL IC (IC3, pin 2), and is then output from pin 8.
4-2-6 3RD LO CIRCUIT (RF UNIT)
The PLL IC (IC3) and X1 oscillate the 19.2 MHz LO signal.
The signal is applied to the PLL IC (pin 16), and is then
applied to the buffer amplifier section of the IC. The amplified
signal is output from pin 17, and is then applied to the 3rd
mixer section of the FM IF IC (IC2, pin 2) as 3rd LO signal.
4-3 OTHER CIRCUITS
4-3-1 BATTERY CHARGER CIRCUIT (LOGIC UNIT)
When the battery charger function is switched ON, the bat-
tery charger control signal becomes high, and is then output
from the CPU (IC1, pin 48) as “CHGC” signal. The signal is
applied to the battery charger controller (Q502), and its out-
put controls the battery charger circuit (Q501, D500, D503) to
output 120 mA charging current.
4-3-2 BAR ANTENNA TUNING CIRCUIT
(LOGIC AND RF UNITS)
When switching to the AM bar antenna while AM band receiv-
ing, the AM bar antenna switching signal is output from the
CPU (LOGIC unit; IC1, pin 44) as “ANTSW” signal. The sig-
nal is applied to the antenna switching circuit (Q510, D76),
and then swtiches to the AM bar antenna.
The CPU (LOGIC unit; IC1) outputs the “TRAC” bar antenna
control signal from pin 141. The signal is applied to the level
convertor (RF unit Q513), and is then applied to the AM bar
antenna tune circuit (D100). The circuit tunes to the desire
frequency to change the D100’s capacity.
Q6, D17
VCO
2ND
VCO
Loop
filter
LPF
Q37, D53
+3S
Ripple
filter
to the 2nd mixer (IC10, pin 3)
8
2
PLL IC
IC3
• 2ND VCO CIRCUIT
