3 - 5
The reference voltage for the comparator is set by R184.
The antenna tuning control voltage (TUN8) is also affected
by the reference voltage to decrease the IF signal level.
The comparator output controls the gate bias of the IF ampli-
fier (Q19), so that the IF signal level is determined by the ref-
erence voltage of the comparator (IC17a).
(2) RF ALC CIRCUIT (FILTER BOARD)
The RF output power level is detected at D9 of the power
detector circuit (L41, D9, D10) on the FILTER board. The
detected signal (“FOR” signal) is applied to the RF ALC
amplifier (IC16a) in the MAIN unit.
The amplified signal enters the transmit gain controller
(IC16b) which functions as an inversion amplifier. The gain
controller decrease the gain of the IF amplifier (Q2) on the
MAIN unit to constant output power from differential amplifi-
er gains which are occurred by their frequency characteris-
tics.
3-2-8 APC CIRCUIT
The APC (Auto Power Control) circuit protects the power
amplifiers on the PA unit from high SWR and excessive cur-
rent.
(1) SWR APC (FILTER BOARD AND MAIN UNIT)
The reflected wave signal appears and increases on the
antenna connector. When the antenna is mismatched, D10
of the power detector circuit (D9, D10, L41) on the FILTER
board detects the signal and applies it to the APC amplifier
(Q23) on the MAIN unit. The output signal decreases the
bias voltage of the RF ALC amplifier to reduce the output
power.
(2) CURRENT APC (PA150W BOARD AND MAIN UNIT)
The power transistor current is detected from the different
voltages between both terminals of a 0.012
Ω
resistor (R26)
on the PA150W board. The detected voltage is applied to
the differential amplifier (IC2b). When the current of the final
transistors is more than 30 A, the detected voltage is applied
to the APC amplifier controller (Q111) in the MAIN unit to
reduce the gate-2 voltage of the IF amplifier (Q2) and thus
reduce the output power.
3-2-9 TEMPERATURE DETECTION
(PA150W BOARD)
Thermal switches (S1, S2) protect the final transistors from
excessive temperatures. When the temperature of the final
transist (Q4) or exceeds 50 ˚C (122 ˚F), S2 is turned ON to
start the cooling fan. When the temperature of the final tran-
sist (Q3) exceeds 110 ˚C (230 ˚F), S1 is turned ON to con-
trol the “POC2” line and sets the power to 60 W.
3-2-10 RF METER CIRCUIT (MAIN UNIT)
The output of the ALC amplifier (IC16a) is applied to the
CPU (pin 31) to indicate the transmit power level on the dis-
play.
for antenna current meter indication, the “ANTC” signal from
an optional AT-130E is applied to the CPU (pin 32).
PLL IC (IC5)
DDS IC
(IC1)
Main loop VCO
Q4
Q3/D4
Reference loop VCO
Q5/D3
Q8
Q11
Q21
Q24
1LO
(69.5115–99.0114 MHz)
Q6
Q2
2LO
(60.0 MHz)
BFO
(9.0106–9.013 MHz)
Reference OSC (X1: 30.0 MHz)
Doubler
D/A
convertor
D/A
convertor
DDS
IC2
Loop filter
Loop filter
Phase
detector
Programmable
divider
Programmable
divider
Phase
detector
Programmable
divider
Programmable
divider
DDS
• PLL CIRCUIT
