5-3
5-3 FREQUENCY SYNTHESIZER CIRCUITS
VCO
While transmitting, the oscillation frequency of the VCO
(Q21, Q22, D22 and D23) is determined by the value of
D22, D23, L22, C26 and C27, adding modulation signal to
D20 modulates the oscillating signal.
The generated signal is passed through the buffers (Q23
and Q24), and then applied to the pre-drive AMP (Q53),
through the LO SW (D50) and buffer (Q50).
While receiving, the generated signal is passed through the
buffers (Q23 and Q24), and then applied to the 1st mixer
(Q150), through the LO SW (D51).
PLL
IC1 is a PLL IC which contains the pre-scaler, programmable
counter, phase comparator and charge pump in its package.
The 21.25 MHz reference frequency signal is fed from X1.
The loop filter is composed by R10, R22, C11, C13 and C24.
5-4 VOLTAGE BLOCK DIAGRAM
LO
SW
BUFF
BUFF
BUFF
FIL
LOOP
X1
21.25 MHz
1st mixer
D 50,D51
Q24
Q23
Q25
Q 21,Q22
IC1
PLL IC
IF IC
CPU
VCO
Q150
TX AMPs
IC170
IC360
PLLO
2ND LO
D22,D23
PLL control signal
*V
regulator
IC****
+***V
**V
CHARGE
CTRL
IC601
VCC
HV
5.0 V DC
R3V
SW
Q221
R3V
T3V
SW
Q222
T3V
3V
regulator
Q224, Q225
M3V: To the TX/RX common circuits
: To the RX circuits
: To CPU and EEPROM
: To the TX circuits
3V
regulator
IC220
CPU3V
PWR
CTRL
Q353
LOGIC UNIT
CHASSIS
Battery
pack
DC-IN
(USB)
MAIN UNIT
•
FREQUENCY SYNTHESIZER CIRCUITS
