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3 - 3
• IN CASE OF THE AF SIGNAL FROM THE ANTENNA
CONNECTOR
The AF signals (received signals) from the antenna connec-
tor (RX unit; J1) are applied to the buffer amplifier (IC9),
CTCSS detector (IC29) and AF amplifier (IC6). The ampli-
fied signals are applied to the expander IC (IC25) to adjust
to a level needed. The adjusted signals pass through the
RPT AF mute switch (IC14), and are applied to the limiter
amplifier (IC3).
• IN CASE OF THE 2/5TONE SIGNALS
The 2/5TONE signal from the CPU (IC33, pin 43) are
applied to the mixer amplifier (IC3) via TX signal filter cir-
cuit (IC3).
• IN CASE OF THE DTMF SIGNALS
The DTMF from dialler IC (IC47, pin 14) are applied to the
mixer amplifier (IC3) via the TX signal filter circuit (IC3).
• IN CASE OF THE CTCSS AND DTCS SIGNALS
The CTCSS and DTCS signals from the CPU (IC33, pin 44)
are applied to the TX-tone filter (IC4, pins 12, 14). The fil-
tered signal are applied to the converter IC (TX unit; IC5) to
adjust tone level, and are then mixed with AF signal at the
mixer amplifier IC (TX unit; IC6).
3-2-2 MODULATION CIRCUIT (TX UNIT)
The modulation circuit modulates the VCO oscillating signal
(RF signal) using the AF signals.
The filtered signals from the LOGIC unit are applied to the
D/A converter (IC5, pin 4) to adjust AF level. The adjusted
signals are applied to the mixer amplifier IC (IC6, pin 1) with
the CTCSS/DTCS signals.
The CTCSS/DTCS signals from the CPU (LOGIC unit; IC33,
pin 44) are pass through the TX-tone filter (LOGIC unit; IC4)
and are then applied to the D/A converter (IC5 pin9) to
adjust tone level.
The mixed signals are applied to the TX VCO circuit to mod-
ulate the oscillated signal (TVCO unit; D5). The TVCO out-
put is amplified at the buffer amplifiers (Q1, Q2) and is then
applied to the drive amplifier circuit.
3-2-3 DRIVE AMPLIFIER CIRCUIT (PA UNIT)
The drive amplifier circuit amplifies the VCO oscillating sig-
nal to the level needed at the power amplifier.
The RF signal from the TX unit pass through the attenuater
circuit (R12–R14), the low-pass filter circuit (L1, L13, C3,
C4, ) and is then applied to the YGR amplifier (Q1). The
amplified signal passes through the low-pass filter circuit
(L4, L5, C8, C9, C56, C66), the attenuater circuit (R3–R5)
and is then applied to the pre-drive amplifier IC1.
3-2-4 POWER AMPLIFIER CIRCUIT (PA UNIT)
The power amplifier circuit amplifies the driver signal to an
output power level.
The RF signal from the pre-drive amplifier (IC1) is applied to
the power amplifier (Q2) to obtain 50 W of RF power.
The amplified signal is passed through the low-pass filter cir-
cuit (L8–L10, C24–C26, C30–C32) and APC detector (R8,
R9, R25, R26, R29, R30, C88, C89, D2, D4), and are then
applied to the antenna connector.
Control voltage for the pre-drive amplifier (IC1, pin 2) comes
from the APC amplifier (IC6, IC7, D10) to obtain stable out-
put power. The transmit mute switch (Q3, Q5, Q8, Q9, D11)
controls YGR amplifier and pre-drive amplifier when transmit
mute is necessary.
3-2-5 APC CIRCUIT (PA UNIT)
The APC circuit protects the power amplifier from a mis-
matched output load and stabilizes the output power.
The APC detector circuit detects forward signals and reflec-
tion signals at D2 and D4 respectively. The combined volt-
age become minimum level when the antenna impedance is
matched at 50
Ω
, and the voltage is increased when it is
mismatched.
The detected voltage is applied to the APC amplifier (IC2,
pin 3), and the power setting “PCON” signal from the D/A
converter (TX unit; IC5), controlled by the CPU (LOGIC unit;
IC33), is applied to APC amplifier (IC2, pin 1) for reference.
When antenna impedance is mismatched, the detected volt-
age exceeds the power setting voltage. Then the output volt-
age of the APC amplifier (IC2, pin 4) controls the input cur-
• APC CIRCUIT (PA UNIT)
YGR
LPF
PWR
ATT
LPF
DET
LPF
ATT
+9V
SW
FWSWR
RVSWR
AMP
PRI AMP
PCON (TX UNIT; IC5)
Q1
Q2
VCC
TX UNIT
TMUTE2
APC
CTRL
TMUTE2
Q5
To IC33; pin 46 (LOGIC UNIT)
To IC33; pin 47 (LOGIC UNIT)
IC2
Q6,Q7
IC1
Summary of Contents for IC-FR3000 Series
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