4 - 4
4-4 POWER SUPPLY CIRCUIT
VOLTAGE LINE
4-5 PORT ALLOCATIONS
4-5-1 CPU (IC14)
4-5-2 I/O EXPANDER (IC23)
LINE
HV
VCC
CPU5V
+5V
S5V
T5V
R5V
DESCRIPTION
The voltage from the attached battery pack.
The same voltage as the HV line (battery volt-
age) which is controlled by the power swtich
([VOL] control).
Common 5 V converted from the VCC line by the
reference regulator circuit (IC12). The output volt-
age is applied to the CPU (IC14), 5 V regulator
circuit (Q32, Q33), reset circuit (IC15), and etc.
Common 5 V converted from the VCC line by the
+5V regulator circuit (Q32, Q33).
Common 5 V converted from the +5V line by the
S5V regulator circuit (Q31).
5 V for transmitter circuits regulated by the T5V
regulator circuit (Q29).
5 V for receiver circuits regulated by the R5V
regulator circuit (Q30).
Outputs data signals for the PLL IC
(IC1), compamder IC (IC9), expander
IC (IC23), D/A converter (IC13), etc.
Outputs strobe signals to the D/A con-
verter (IC13).
Output clock signal to the DTMF
decoder (IC17).
Outputs single tone signal.
Outputs CTCSS/DTCS tone signal.
Single tone signal input port for decod-
ing.
CTCSS/DTCS signals input port for
decoding.
Input port for the volume control [VOL].
High : [VOL] is maximum clockwise.
Input port for the PLL lock voltage.
Input port for the RSSI detection.
Input port for the reset signal.
Outputs serial data signals to the
DTMF decoder IC (IC17).
Outputs transmit mute signal.
Low : During unlock or while muted
Outputs R5 regulator control signal.
Low: While receiving
Outputs T5 regulator control signal.
Low: While transmitting
Input port for noise signals (pulse-
type) for noise squelch operation.
I/O port for data signals from/to the
D/A converter (IC27).
I/O port for data signals from/to
EEPROMs (IC16, IC24).
Outputs beep audio signals.
Outputs clock signal to EEPROMs
(IC16, IC24).
Outputs clock signal to the D/A con-
verter (IC27).
SO
DAST
DTAC
SENC
CTDA
SDEC
RXDT
AFVI
LVIN
RSSI
RES
DTSD
TMUT
R5C
T5C
NOIS
SDA
MSO
BEEP
MSCK
SCL
35
36
39
43
44
45
46
47
49
50
59
68
70
71
73
75
81
82
87
94
95
4
5
6
7
13
15
16
17,
18,
19
,
21
22–
25
26
28
29
34
RESB
RMUT
MMUT
PTOT
EXST
APST
DIN
RGS1,
RGS2,
MSKE
,
FCLR
CB10–
CB13
VCOS
PLST
ULCK
SCK
Outputs reset signal for the expader IC
(IC23).
Input port for AF mute signal from the
optional units via J1 or J2.
Input port for MIC mute signal from the
optional units via J1 or J2.
Input port for the [PTT] switch
Low : While [PTT] switch is pushed.
Outputs strobe signals to the expander
IC (IC23).
Outputs strobe signals to the compan-
der IC (IC9).
Outputs serial data signals to the com-
pander IC (IC9).
Output control signal for the compan-
der IC (IC9).
Outputs reset signal for the compan-
der IC (IC9).
Input ports for rotary selector [SEL].
Outputs TX VCO/RX VCO switching
signal for the VCO switch (Q9, Q10).
High : While transmitting
Outputs strobe signals to the PLL IC
(IC1).
Input port for the PLL unlock signal.
Low : PLL is unlocked.
Outputs clock signal for the PLL IC
(IC1), compamder IC (IC9), expander
IC (IC23), D/A converter (IC13), etc.
PIN
PORT
DESCRIPTION
NO.
NAME
PIN
PORT
DESCRIPTION
NO.
NAME
4
6
7
11
12
13
14
BUSY
DUSE
W/N
S5C
SPCN
AFMT
FSW
Outputs BUSY detection.
Low : The channel is busy.
Outputs low-pass filter cut-off frequen-
cy control signal when DTCS is acti-
vated.
Outputs IF bandwidth control signal.
High : While IF bandwidth is narrow.
Outputs S5 regulator control signal.
Outputs internal speaker select signal.
Outputs control signal for the AF
amplifier regulator circuit.
High: While AF amp. is activated.
Outputs high-pass filter’s characteris-
tics select signal.
Pin
Port
Description
number
name
