4 - 1
SECTION 4
CIRCUIT DESCRIPTION
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN unit)
The antenna switching circuit functions as a low-pass filter
while receiving and as resonator circuit while transmitting.
The circuit does not allow transmit signals to enter receiver
circuits.
Received signals enter the antenna connector and pass
through the low-pass filter (L1–L3, C1, C3, C8–C11, C13).
The filtered signals are then applied to the RF circuit passed
through the
λ
⁄
4
type antenna switching circuit (D13, D14,
L18).
4-1-2 RF CIRCUIT (MAIN unit)
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the attenuator circuit (D13, D14) and the two-stage tunable
bandpass filters (D16, D17). The filtered signals are ampli-
fied at the RF amplifier (Q12) and then enter the another
two-stage bandpass filters (D18–D21) to suppress unwant-
ed signals. The filtered signals are applied to the 1st mixer
circuit (Q13).
The tunable bandpass filters (D16–D21) employ varactor
diodes to tune the center frequency of the RF passband for
wide bandwidth receiving and good image response rejec-
tion. These diodes are controlled by the CPU (FRONT unit;
IC1) via the level controller (IC5).
The attenuator circuit (D13, D14) functions only when the
attenuator function is assigned to a programable key and
turnes on to protect the RF amplifier from distortion caused
by receiving excessively strong signals.
When the attenuator function is turned on, CPU (FRONT
unit; IC1, pin 32) switches the voltage level of the “RF ATT”
line from high to low and then controls the attenuator switch
(Q35). In this case, the current of D13, D14 is increased and
D13, D14 act as an attenuator.
4-1-3 1ST MIXER AND 1ST IF CIRCUITS
(MAIN unit)
The 1st mixer circuit converts the received signals to a fixed
frequency of the 1st IF signal with the PLL output frequency.
By changing the PLL frequency, only the desired frequency
will pass through a pair of crystal filters at the next stage of
the 1st mixer.
The RF signals from the bandpass filter are applied to the
1st mixer circuit (Q13). The applied signals are mixed with
the 1st LO signal coming from the VCO circuit (Q7, Q8) to
produce a 31.05 MHz 1st IF signal. The 1st IF signal pass-
es through a pair of crystal filters (FI1a/b) to suppress out-
of-band signals. The filtered signal is amplified at the 1st IF
amplifier (Q14) and applied to the 2nd IF circuit.
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN unit)
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double-conversion superheterodyne system
improves the image rejection ratio and obtains stable receiv-
er gain.
The 1st IF signal from the IF amplifier (Q14) is applied to the
2nd mixer section of the FM IF IC (IC3, pin 16) and is then
mixed with the 2nd LO signal for conversion to a 450 kHz
2nd IF signal.
IC3 contains the 2nd mixer, limiter amplifier, quadrature
detector, active filter and noise amplifier circuits, etc. A dou-
bled frequency from the PLL reference oscillator is used for
the 2nd LO signal (30.6 MHz).
The 2nd IF signal from the 2nd mixer (IC3, pin 3) passes
through ceramic filters (FI3 and FI4) during narrow channel
spacing selection or passes through FI4 (bypassing FI3)
only during wide channel spacing selection. It is then ampli-
fied at the limiter amplifier section (IC3, pin 5) and applied to
the quadrature detector section (IC3, pins 10, 11 and X3) to
demodulate the 2nd IF signal into AF signals.
The AF signals are output from pin 9 (IC3) and are then
applied to the AF amplifier circuit.
• 2nd IF and demodulator circuits
FI4
2nd IF filter
Noise
detector
PLL IC
IC2
Limiter
amp.
FM
detector
Active
filter
AF signals
R5
X3 Discriminator
IC5
RSSI
Mixer
X1
15.3 MHz
30.6 MHz
1st IF signal from the IF amplifier (Q14)
NOIS signal to the CPU (FRONT unit; IC1)
8
7
5
FI3
BPF
3
2
2
17
15
16
13
11
10
9
IC3
TA31136FN
