4 - 1
• 2ND IF DEMODULATOR CIRCUIT
SECTION 4
CIRCUIT DESCRIPTION
FI1
2nd IF filter
450 kHz
Noise
detector
Q1
Limiter
amp.
Quadrature
detector
Active
filter
AF signals
5V
Q3
IF
AMP
X4 Discriminator
IC8
Mixer
X2
15.3 MHz
45.9 MHz
1st IF from the IF amplifier (Q6)
“NOIS” signal to the CPU (IC23)
“DFIL” signal to the digital IF filter (FI3)
8
2
1
7
5
BPF
3
2
3
16
13
11
10
9
IC12
TA31136FN
Noise
amp.
Noise
comparator
FI2
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and a resonator circuit while transmitting.
This circuit does not allow transmit signals to enter the
receiver circuits.
Received signals enter the antenna connector (CHASSIS;
J1) and pass through the low-pass filters (L42–L44, L49
C376, C388, C389, C391, C432, C461, C551, C552). The
filtered signals are passed through the
λ
⁄
4
type antenna
switching circuit (D29–D31).
While receiving, no voltage is applied to the D29–D31. Thus,
the receive line and ground are disconnected and L39, C384
function as a low-pass filter which leads received signals to
the RF circuits via the limiter (D27, D28).
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the two-stage tunable bandpass filters (D23, D26, D68,
D69, L32, L36). The filtered signals are amplified at the RF
amplifier (Q24) and then passed through the another two-
stage tunable bandpass filters (D17, D18, L28) to suppress
unwanted signals. The filtered signals are applied to the 1st
mixer circuit.
D17, D18, D23, D26, D68 and D69 employ varactor diodes,
that are controlled by the Main CPU (IC23) via the D/A
converter (IC30, pins 1, 2) to track the bandpass filter.
These varactor diodes tune the center frequency of an RF
passband for wide bandwidth receiving and good image
response rejection.
4-1-3 1ST MIXER AND 1ST IF CIRCUITS (MAIN UNIT)
The 1st mixer circuit converts the received signals into fixed
frequency of the 1st IF signal with the PLL output frequency.
By changing the PLL frequency, only the desired frequency
passes through a monolithic filter at the next stage of the
1st mixer.
The RF signals from the bandpass filter are mixed with
the 1st LO signal, where come from the RX VCO circuit
(RX VCO1: Q11, D7, D11; RX VCO2: Q12, D9, D13) via
the 1st LO amplifier (Q21) and low-pass filter (L24, L26,
C246, C264, C516) at the 1st mixer circuit (D16, L22, L23)
to produce a 46.35 MHz 1st IF signal. The 1st IF signal is
amplified at IF amplifiers (Q10, Q13, Q14), and then passed
through a monolithic filter (FI4) to suppress unwanted sig-
nals and to pass only the desired signals.
The filtered signal is applied to the IF amplifier (Q6) and
then applied to the 2nd IF circuit.
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal into a 2nd
IF signal. The double conversion superheterodyne system
(which convert receive signals twice) improves the image
rejection ratio and obtains stable receiver gain.
The 1st IF signal from the IF amplifier (Q6) is applied to
the 2nd mixer section of the FM IF IC (IC12, pin 16), and
is mixed with the 2nd LO signal to be converted into a
450 kHz 2nd IF signal.
The FM IF IC (IC12) contains the 2nd mixer, limiter ampli-
fier, quadrature detector, active filter and noise amplifier
circuits.
