![background image](http://html2.mh-extra.com/html/icom/ic-7600/ic-7600_service-manual_4139041019.webp)
3 - 10
Pin
No.
Line
Name
Description
I/O
1
CNTV
TFT contrast control. (D/A)
(1–2.3 V)
O
2
PWRD
POWER LED control.
(0 V=Light OFF, 3.3 V=Light ON.)
O
3
LDAT
Expander (BU2099) data.
O
4
LST
Expander (BU2099) strobe.
O
5
RTCCK
Expander (BU2099) clock.
O
8
RTCCE
Clock IC (RX-4581) chip enable.
O
9
MOND
[MONITOR] LED control signal.
O
16
RTCIRQ Clock IC (RX-4581) interlude control.
I
19
RSB
RIT dial (24x4 pulses) phase-B input.
I
20
RSA
RIT dial (24x4 pulses) phase-A input.
I
21
MSB
Main dial (250x4 pulses) phase-B input.
I
22
MSA
Main dial (250x4 pulses) phase-A input.
I
23
TMD
Timer LED control.
H=Light ON.
O
24
LEDV
LED brightness control. (PWM, 600 Hz)
O
25
BKLS
LCD backlight ON/OFF.
H=Backlight ON.
O
26
CFLV
CFL backlight brightness control. (PWM, 600
Hz)
O
28
PHNI
Headphone connection detect.
H=Connection detected.
I
29
DTXD
Falsh read data.
O
30
DRXD
Flash write data.
I
31
SLOS
Flash write clock.
H=While writing.
O
32
DBP1
Flash write "BUSY."
O
33
LTXD
Data output (UART) for the communication
with main CPU.
O
34
LRXD
Data input (UART) for the communication with
main CPU.
I
35
DOTK
Ele-key input. (Dot)
I
36
DSHK
Ele-key input. (Dash)
I
37
SQSS
Squelch signal to the [MICROPHONE JACK].
H=Squelch open.
O
38
RTCDT
Clock IC (RX-4581) data.
I/O
40
TRAK
[TRANSMIT] input. (Pull-up)
I
41
F1K
[F-1] input. (Pull-up)
I
42
F2K
[F-2] input. (Pull-up)
I
43
F3K
[F-3] input. (Pull-up)
I
44
LOE
Expander (BU2099) output enable.
O
45
F4K
[F-4] input. (Pull-up)
I
46
F5K
[F-5] input. (Pull-up)
I
47
F6K
[F-6] input. (Pull-up)
I
49
SSBK
[SSB] input. (Pull-up)
I
50
CWK
[CW] input. (Pull-up)
I
51
RTYK
[RTTY/PSK] input. (Pull-up)
I
52
AMK
[AM/FM] input. (Pull-up)
I
53
FILK
[FILTER] input. (Pull-up)
I
55
EXTK
[EXIT/SET] input. (Pull-up)
I
56
PLYK
[PLAY key input. (Pull-up)
I
57
RECK
[REC] input. (Pull-up)
I
58
XFCK
[XFC] input. (Pull-up)
I
65
MPRK
[MP-R] input. (Pull-up)
I
66
MWK
[MW] input. (Pull-up)
I
67
UPK
[
▲
] input. (Pull-up)
I
• FRONT CPU (LOGIC UNIT: IC101)
Pin
No.
Line
Name
Description
I/O
68
DWK
[
▼
] input. (Pull-up)
I
69
MPWK
[MP-W] input. (Pull-up)
I
70
VMK
[V/M] input. (Pull-up)
I
71
ATK
[AUTO TUNE] input. (Pull-up)
I
72
TSK
[TS] input. (Pull-up)
I
73
PWRK
[POWER] input. (Pull-up)
I
76
FPWRS
Analog circuit control signal.
H=Transceiver power ON.
I/O
83,
84
PB2B,
PB2A
Input ports for [PBT2] (outer control).
I
85,
86
PB1B,
PB1A
Input ports for [PBT1] (inner control).
I
87
LG_RES
Logic circuits reset signal.
H=Reset.
O
88
LG_
PWR
Logic circuits power control signal.
H=Transceiver power ON.
O
89
MUDL
[MIC GAIN] input. (A/D)
I
90
AS4
Voltage from the analog SW (CD4501). (A/D)
(0–3.3 V)
I
91
AS3
Voltage from the analog SW (CD4501). (A/D)
(0–3.3 V)
I
93
AS1
Voltage from the analog SW (CD4501). (A/D)
(0–3.3 V)
I
98
ASL2
Analog SW (CD4501) control signal.
O
99
ASL1
Analog SW (CD4501) control signal.
O
100
ASL0
Analog SW (CD4501) control signal.
O