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4-2-5 APC CIRCUIT (MAIN UNIT)
The APC circuit protects the pre-drive (Q21), drive amplifier
(Q25) and power amplifier (Q27) from a mismatched output
load and stabilizes the output power.
• VHF APC CIRCUIT
The SWR detector circuit (D57, D61) detects forward signals
and reflection signals at D57 and D61 respectively. The
impedance is matched at 50
Ω
and is increased when it is
mismatched.
• UHF APC CIRCUIT
The SWR detector circuit (D50, D58) detects forward signals
and reflection signals at D50 and D58 respectively. The
impedance is matched at 50
Ω
and is increased when it is
mismatched.
The detected voltage is applied to the diffrential amplifier
(IC2, pin 3) via the “POWER_DET” line, and the power set-
ting voltage from the D/A convertor (IC1, pin 12) is applied to
another input (IC2, pin 1) for the reference as “PWRCON”
line.
When antenna impedance is mismatched, the detected volt-
age exceeds the power setting voltage. The output voltage of
the differential amplifier (IC2, pin 4) controls the input current
of the pre-drive (Q21), drive amplifier (Q25) and power
amplifier (Q27) to reduce the output power.
4-3 PLL CIRCUITS
4-3-1 GENERAL
A PLL circuit provides stable oscillation of the transmit fre-
quency and the receive local frequency. The PLL circuit com-
pares the phase of the divided VCO frequency to the refer-
ence frequency. The PLL output frequency is controlled by a
crystal oscillator and the divided ratio (N-data) of the pro-
grammable divider.
4-3-2 PLL CIRCUIT FOR RIGHT SIDE DISPLAY
(MAIN UNIT)
The R-VCO (for right side display) composes of VHF-VCO
and UHF-VCO circuits.
• FROM THE VHF-VCO CIRCUIT
An oscillated signal from the VHF-VCO circuit (Q1038,
D1014, D1015) passes through the buffer amplifiers (Q1043,
Q1016) and VCO switch (D1023) is applied to the PLL IC for
right side display (IC1008, pin 8)
• FROM THE UHF-VCO CIRCUIT
An oscillated signal from the UHF-VCO circuit (Q1038,
D1016–D1018) passes through the buffer amplifiers
(Q1044,Q1016) and VCO switch (D1023) is applied to the
right side diplayed PLL IC (IC1008, pin 8)
And is then prescaled in the PLL IC based on the divided
ratio (N-data). The reference signal is generated at the refen-
rece oscillator (VCO unit; X1, 12.8 MHz), and is then ampli-
fied at the buffer amplifier (Q1012). The reference signal is
also applied to the PLL IC. The PLL IC detects the out-of-
step phase using the reference frequency and outputs it from
pin 16. The output signal is passed through the loop filter
(Q1020, Q1021, D1008) and is then applied to the right side
display VCO circuit as lock voltage.
4-3-3 R-VCO CIRCUIT FOR RIGHT SIDE DISPLAY
(MAIN UNIT)
The VCO circuit for right side display contains a separated
the VHF-VCO (Q1038, D1014, D1015) and UHF-VCO
(Q1039, D1016–D1018) circuits.
• VHF-VCO (RX ONLY)
The oscillated signal at the VHF-VCO circuit is amplified at
the buffer amplifier (Q1043), and then passes through the
attenuator (R2209–R2211, C2123) and low-pass filter
(L1045, L1046, C1207, C1249, C1250, C1289, C1304). The
signal is applied to the 1st mixer circuit for right side display
(IC1006, pin 4) via the VCO switch (D1028) as the 1st LO
signal.
A portion of the signal from the buffer amplifier (Q1043)
passes through the VCO swtich (D1023), and is then ampli-
fied at the buffer amplifier (Q1016). The amplified signal is
fed back to the PLL IC (IC1008, pin 8) as the comparison sig-
nal.
Pre
drive
Buff.
amp.
Drive
amp.
Q27
Q21
RF signal
from PLL circuit
Q25
TX
SW
TXC
VHF SWR
DETECTOR
(D57, D61)
VHF transmitter signal
to antenna
UHF transmitter signal
to antenna
UHF SWR
DETECTOR
(D50, D58)
8V
Q22
PWRCON
APC CONTROLLER
IC2
• APC CIRCUIT