3 - 9
Description
Common 3 V converted from the HV line by the
+3 regulator circuit (IC9901).
Common 3 V converted from the 14V line by the
+3 regulator circuit (IC9921).
Common 5 V converted from the 14V line by the
+5 regulator circuit (IC9941).
The same voltage as the 5V line which is con-
trolled by the switching circuit (Q9964, Q9966).
The circuit is controlled by the “PSS” signal from
the CPU (IC5901, pin 90).
Common 8 V converted from the 14V line by the
+8 regulator circuit (IC9961).
The same voltage as the 8V line which is con-
trolled by the switching circuit (Q9963, Q9965).
The circuit is controlled by the “PSS” signal from
the CPU (IC5901, pin 90).
Receive 8 V which is the same voltage as the 8V
line controlled by the switching circuit (Q6322,
Q6323) using the “RXS” signal from the CPU
(IC5901, pin 36).
Transmit 8 V which is the same voltage as the 8V
line controlled by the switching circuit (Q6342,
Q6343) using the “TXS” signal from the CPU
(IC5901, pin 35).
Line
H3V
3V
5V
P5V
8V
P8V
R8V
T8V
3-5 POWER SUPPLY CIRCUITS
3-5-1 VOLTAGE LINES (MAIN UNIT)
Description
The voltage from a DC power supply.
The same voltage as the HV line which is con-
trolled by the power switching circuit (Q80, Q81).
When the [POWER] switch is pushed, the CPU
outputs the “POWS” control signal to the power
switching circuit to turn the circuit ON.
Line
HV
14V
3-5-2 PA UNIT VOLTAGE LINES
Description
Common 8 V line from the +8 regulator circuit
(MAIN unit; IC9961). The voltage is applied to the
microphone via the J1, pin 1.
Common 5 V converted from the 5V line by the
+5 regulator circuit (IC5, Q10, Q11, D9). The out-
put voltage is applied to the SUB-CPU (IC6),
LCD driver (IC2), etc.
Line
8V
5V
3-5-3 VOLTAGE LINES (DISPLAY BOARD)
1
2
3
4
5
8
9
16
18
19
20
21
22
23
25
26
27
28
31
33
34
39
Outputs beep audio and CW side tone
signals.
Outputs CTCSS tone signal.
Outputs the serial data to the PLL IC
(IC9601).
Input port for transmitting signals from
the microphone or ACC connector.
Outputs the serial clock to the PLL IC
(IC9601).
Outputs control signal for the optional
2nd IF filter.
High : While the filter is selected.
Outputs control signal for the 2nd IF fil-
ter.
High : While the filter is bypassed.
Input port for the shock detecting sig-
nal.
Input port for the [POWER] swtich on
the front panel.
Low :
While the [POWER] is
pushed.
Outputs control signal for the 2nd IF fil-
ter.
High : While the 8 kHz filter is ON.
Outputs control signal for the 2nd IF fil-
ter.
High : While the 2.3 kHz filter is ON.
Input port for the PLL unlock signal.
Low : While the PLL is unlocked.
Outputs tuner data signal.
Outputs CW key down signal.
High : While transmitting on CW or
RTTY modes.
Output SSB modulation prohibitive sig-
nal.
High : While transmitting on CW, FM
or RTTY modes.
Input port for the PTT signal from the
data terminal (J6851, pin 3).
High : While data are transmitting.
Input port for the data signal from the
front unit.
Outputs data signal to the front unit.
Outputs LO level control signal.
Outputs CI-V signals.
Input port for the CI-V signals.
Outputs strobe signal to the PLL IC
(IC9601) for the 2nd LO signal.
3-6 CPU PORT ALLOCATIONS
3-6-1 MAIN CPU PORT ALLOCATIONS
(MAIN UNIT; IC5901)
BEEP
TONE
PDT
SNDK
PCK
2NOP
2NTH
TGK
PWRK
2N80
2N23
UNLK
TDAT
KDS
MINH
DPTK
LRXD
LTXD
SLOS
CTXD
CRXD
P2ST
Pin
Port
Description
number
name
