GC-76/GC-106 GAS LEAK DETECTION CORE USER MANUAL
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6-1-1 LVCMOS
LVCMOS digital video can be enabled/disabled with control commands. In the
open state, users can choose to output raw data (ORG), non-uniform correction
(NUC) data, DNS Data, temperature (TEMP) data, and image processing (DRC)
data.
When choosing to use DRC data, the digital zoom and temperature display
functions
are not available.
LVCMOS digital video includes 1 Clock signal (Clock), 1 line valid (Line_Valid)
signal, 1 valid frame signal (Frame_Valid), and 14 data signals (DV0-DV13).
Pixel data bits are divided into 8-bit and 14-bit. When ORG or TEMP data is
produced, the data bits are 14-bits, namely DV[13:0], where DV0 is LSB and
DV13 is the MSB. When the user selects DRC, the data bits are 8-bits, namely
DV[7:0], where DV0 is LSB and DV9 is for the MSB.
LVCMOS Clock Frequency
Model
Clock Frequency
GC-76
12.857 MHz
Note:
1.
Clock rising edge sampling is recommended for DV.
2.
The high level is valid for Line_Valid and Frame_Valid.
3.
After Line_Valid is valid it lasts for n Clock, which corresponds to the data of the first column
to the last column of the row in turn.
6-1 Digital Video
6.
Digital Video
