IBM Power 780, Technical Overview And Introduction

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Chapter 4. Continuous availability and manageability
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4.5 RAS features
In this section, we list RAS features in this release:
򐂰 Power-On Reset Engine (PORE)
Enables a processor to be re-initialized while the system remains running. This feature will
allow for the Concurrent Firmware Updates situation, in which a processor initialization
register value needs to be changed. Concurrent firmware updates might be more
prevalent.
򐂰
L3 Cache dynamic column repair
This self-healing capability completes cache-line delete and uses the PORE feature to
potentially avoid some repair actions or outages that are related to L3 cache.
򐂰 Accelerator RAS
New accelerators are designed with RAS features to avoid system outages in the vast
majority of faults that can be detected by the accelerators.
򐂰 Fabric Bus Dynamic Lane Repair
has spare bit lanes that can dynamically be repaired (using PORE). For
busses that connect 770 and 780 CEC drawers, this feature avoids any repair
action or outage related to a single bit failure for the fabric bus.
IBM extends performance leadership with :
򐂰 drives per core performance with faster clock speeds.
򐂰 increases L3 cache by 2.5X compared to POWER7.
򐂰
improves memory compression with hardware assist.
򐂰
improves AIX file encryption with hardware assist.
򐂰
delivers twice the single-precision floating-point performance.
򐂰
GX buses deliver even more I/O bandwidth.
Virtualized efficiency continues to improve:
򐂰 Power gating techniques help reduce energy consumption
򐂰 Minimum partition size reduced to one-twentieth of a processor core
򐂰 Increased number of concurrent partition migrations
򐂰 Dynamic Platform Optimizer optimizes virtualization environment