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IBM Power 750 and 760 Technical Overview and Introduction
2.3.3 Memory bandwidth
has exceptional cache, memory, and interconnect bandwidths. Table 2-8 shows
the maximum bandwidth estimate for the Power 750 system running at 4.06 GHz.
Table 2-8 Power 750 processor and memory bandwidth estimates
Table 2-9 shows the maximum bandwidth estimate for a Power 760 running at 3.416 GHz.
Table 2-9 Power 760 processor and memory bandwidth estimates
The bandwidth figures for the caches are calculated as follows:
L1 cache: In one clock cycle, two 16-byte load operations and one 16-byte store operation
can be accomplished. Using an 4.060 GHz processor card the formula is as follows:
(2 * 16 B + 1 * 16 B) * 4.060 GHz = 194.88 GBps
L2 cache: In one clock cycle, one 32-byte load operation and one 16-byte store operation
can be accomplished. Using an 4.060 GHz processor card the formula is as follows:
(1 * 32 B + 1 * 16 B) * 4.060 GHz = 194.88 GBps
L3 cache: One 32-byte load operation and one 32-byte store operation can be
accomplished at half-clock speed. Using an 4.060 GHz processor card, the formula is as
follows:
(1 * 32 B + 1 * 32 B) * (4.060 GHz / 2) = 129.92 GBps
Memory
Power 750
4.060 GHz processor card
L1 (data) cache
194.880 GBps
L2 cache
194.880 GBps
L3 cache
129.920 GBps
Chip to chip in DCM (XZ bus)
4 DCMs
96.768 GBps
387.072 GBps
DCM to DCM (AB bus)
236.544 GBps
System memory
4 DCMs
68.224 GBps
272.896 GBps
Memory
Power 760
3.416 GHz processor card
L1 (data) cache
163.968 GBps
L2 cache
163.968 GBps
L3 cache
109.312 GBps
Chip to chip in DCM (XZ bus)
4 DCMs
96.768 GBps
387.072 GBps
DCM to DCM (AB bus)
236.544 GBps
System memory
4 DCMs
68.224 GBps
272.896 GBps