Appendix C. IRQ and DMA Channel Assignments
Appendix C. IRQ and DMA Channel Assignments
The following figures list the interrupt request (IRQ) and direct memory access (DMA) channel
assignments.
Figure 44. IRQ Channel Assignments
IRQ
System Resource
NMI
Critical System Error
SMI
System Management Interrupt — Power Management
0
Reserved (interval timer)
1
Reserved (keyboard)
2
Reserved, Cascade interrupt from slave PIC
3
Available to user
4
COM1
5
5
LPT2/Audio (if present)
6
Diskette controller
7
LPT1
5
8
Real-time clock
9
Video
10
Available to user
11
Available to user
12
Mouse port
13
Reserved (math coprocessor)
14
Primary IDE (if present)
15
Secondary IDE (if present)
Figure 45. DMA Channel Assignments
DMA Channel
Data Width
System Resource
0
8 bits
Open
1
8 bits
Open
2
8 bits
Diskette drive
3
8 bits
Parallel port (for ECP or EPP)
4
–
Reserved (cascade channel)
5
16 bits
Open
6
16 bits
Open
7
16 bits
Open
5
Default, can be changed to another IRQ.
44
Copyright IBM Corp. November 1998
