IBM IC25N040ATCS04 - Travelstar 40 GB Hard Drive Specifications Download

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14.0 Time-out values

The timing of BSY and DRQ in Status Register are shown in the table below.

400 ns

Status Register

BSY=1

OUT to Command

Device Busy

After Command

Code Out

DMA Data

Transfer

Command

30 sec

(Note 2)

Interrupt

Status Register

BSY=1

Interrupt For

Command

Complete

400 ns

Status Register

BSY=1

OUT to Command

Device Busy

After Command

Code Out

Non-Data

Command

30 sec

(Note 1)

Status Register

BSY=0 and RDY=1

Interrupt

Status Register

BSY=1

Interrupt For

Data Transfer

Out

Status Register

BSY=1

256th Write From

Data Register

Device Busy

After Data

Transfer Out

700

(Note 3)

Status Register

BSY=0 and DRQ=1

Status Register

BSY=1

Data Request

For Data

Transfer Out

400 ns

Status Register

BSY=1

OUT to Command

Device Busy

After Command

Code Out

Data Out

Command

Status Register

BSY=1

256th Read From

Data Register

Device Busy

After Data

Transfer In

30 sec

Status Register

BSY=0 and DRQ=1,

Interrupt

Status Register

BSY=1

Interrupt, DRQ

For Data

Transfer In

400 ns

Status Register

BSY=1

OUT To Command

Device Busy

After Command

Code Out

Data In

Command

31 sec

Status Register

BSY=0 and RDY=1

Bus RESET Signal

Asserted

Device Ready

After Hard

Reset

400 ns

Status Register

BSY=1

Bus RESET Signal

Asserted

Device Busy

After Hard

Reset

Hard Reset

31 sec

Status Register

BSY=0 and RDY=1

Device Control

After RST=1

Device Ready

After Software

Reset

400 ns

Status Register

BSY=1

Device Control

Device Busy

After Software

Reset

Software

Reset

31 sec

Status Register

BSY=1 and RDY=1

Power On

Device Ready

After Power On

400 ns

Status Register

BSY=1

Power On

Device Busy

After Power On

Power On

TIME-OUT

STOP

START

INTERVAL

Figure 141. Time-out values

Travelstar 60GH & 40GN hard disk drive specifications

195

Summary of Contents for IC25N040ATCS04 - Travelstar 40 GB Hard Drive

Page 1: ...tar 60GH 40GN 2 5 inch ATA IDE hard disk drive IC25N010ATCS04 IC25N020ATCS04 IC25N030ATCS04 IC25N040ATCS04 IC25T060ATCS05 Models Revision 3 0 22 January 2002 S07N 7681 09 Publication 1540 IBM storage...

Page 2: ...rive specifications Travelstar 60GH 40GN 2 5 inch ATA IDE hard disk drive IC25N010ATCS04 IC25N020ATCS04 IC25N030ATCS04 IC25N040ATCS04 IC25T060ATCS05 Models Revision 3 0 22 January 2002 S07N 7681 09 Pu...

Page 3: ...ublication could include technical inaccuracies or typographical errors Changes are periodically made to the information herein these changes will be incorporated in new editions of the publication IB...

Page 4: ...location 20 5 6 Error recovery 20 5 5 Data buffer test 20 5 4 WRITE safety 19 5 3 Equipment status 19 5 2 Write Cache 19 5 1 Data loss on power off 19 5 0 Data integrity 17 4 4 3 Operating modes 15 4...

Page 5: ...bling 41 7 0 Electrical interface specifications 40 6 11 Packaging 40 6 10 5 Secondary circuit protection 40 6 10 4 Flammability 40 6 10 3 German Safety Mark 40 6 10 2 IEC compliance 40 6 10 1 UL and...

Page 6: ...etion timing 80 11 6 2 Power management commands 80 11 6 1 Power Mode 80 11 6 Power management features 79 11 5 2 LBA addressing mode 78 11 5 1 Logical CHS addressing mode 78 11 5 Sector Addressing Mo...

Page 7: ...tic 90h 116 13 3 Enable Disable Delayed Write FAh vendor specific 113 13 2 4 DEVICE CONFIGURATION SET subcommand C3h 113 13 2 3 DEVICE CONFIGURATION IDENTIFY subcommand C2h 113 13 2 2 DEVICE CONFIGURA...

Page 8: ...87 13 37 Write Long 32h 33h 185 13 36 Write DMA CAh CBh 184 13 35 Write Buffer E8h 183 13 34 Standby Immediate E0h 94h 182 13 33 Standby E2h 96h 181 13 32 6 Error reporting 180 13 32 5 Self test log d...

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Page 10: ...ounting hole locations of all models except 60 GB model 31 Figure 26 Mounting hole locations of the 60 GB model 31 Figure 25 Physical dimensions and weight 27 Figure 24 Typical current wave form at st...

Page 11: ...Disable Delayed Write command FAh 115 Figure 79 DCO error information definition 114 Figure 78 Device Configuration Overlay Data structure 112 Figure 77 Device Configuration Overlay Features register...

Page 12: ...s Flag definitions 171 Figure 124 Individual Attribute Data Structure 170 Figure 123 Device Attribute Data Structure 167 Figure 122 Log sector addresses 165 Figure 121 S M A R T Function Set command B...

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Page 14: ...1 Abbreviations hard disk drive HDD hexadecimal h ground GND 32 ft sec 2 per Hertz G2 Hz 1 000 000 000 bits per square inch Gb sq in 1 000 000 000 bytes GB 1 000 000 000 bits Gb gravity a unit of forc...

Page 15: ...peak p p part number P N population Pop power on hours POH PIO Open Drain Programmed Input Output OD Output O oscillations per minute oct min number No or microsecond us s millisecond ms millimeter m...

Page 16: ...rface of the printed circuit board The drive can be damaged by shock or ESD Electric Static Discharge Any damages incurred to the drive after removing it from the shipping package and the ESD protecti...

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Page 18: ...is used for firmware Fast data transfer rate up to 100 MB s Media data transfer rate max 60 GB model 261 Mb s all other models 245 Mb s Average seek time 12 ms for read Closed loop actuator servo Embe...

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Page 20: ...Part 1 Functional specification Travelstar 60GH 40GN hard disk drive specifications 7...

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Page 22: ...Servo No ID TM formatting Multizone recording Code 96 104 MTR ECC On The Fly Enhanced Adaptive Battery Life Extender 3 2 Head disk assembly data The following technologies are used in the drive Pico...

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Page 24: ...at high TPI format 512 512 512 Bytes per Sector Physical Layout IC25N030ATCS04 IC25N040ATCS04 IC25T060ATCS05 Description 10 056 130 560 20 003 880 960 Total Logical Data Bytes 19 640 880 39 070 080 Nu...

Page 25: ...er models 60 GB model Figure 4 Data sheet 4 3 Cylinder allocation by model number 307 33536 35071 15 336 30976 33535 14 352 29184 30975 13 364 27392 29183 12 384 24320 27391 11 403 22272 24319 10 416...

Page 26: ...rmat Figure 6 Cylinder allocation all models except 60 GB high TPI format 360 35328 38143 15 384 31744 35327 14 420 28160 31743 13 450 26880 28159 12 480 25344 26879 11 480 23296 25343 10 504 22016 23...

Page 27: ...ndent upon the system and the application The following table gives a typical value for each parameter The detailed descriptions are found in section 5 0 100 100 Buffer host data transfer MB s 130 245...

Page 28: ...rom the start of motion of the actuator to the start of a reliable read or write operation A reliable read or write operation implies that error correction recovery is not employed to cor rect arrival...

Page 29: ...ls 5 5 11 1 5400 60 GB model Average Latency ms Time for one revolution ms Rotational Speed RPM Model Figure 12 Latency time 4 4 2 5 Drive ready time 9 5 3 0 All other models Power On To Ready 9 5 5 0...

Page 30: ...de The execution of commands is delayed until the spindle becomes ready Sleep The device requires a soft reset or a hard reset to be activated All electronics including spindle motor and host interfac...

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Page 32: ...loss confirm the completion of the actual write operation prior to the power off by issuing a Soft reset Hard reset Flush Cache command Standby command Standby Immediate command Sleep command Confirm...

Page 33: ...t any auto reallocation to the host system The conditions for auto reallocation are described below 5 7 1 Nonrecovered write errors When a write operation cannot be completed after the Error Recovery...

Page 34: ...of the byte is bad On The Fly correctable Byte 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 1 1 1 1 1 1 1 1 Interleave A B C A B C A B C A B C A B C A B C A B C Error pattern 5 Error byte for each interleave X...

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Page 36: ...ure gradient Altitude Operating conditions Figure 17 Environmental condition The system is responsible for providing sufficient air movement to maintain surface temperatures below 60 C at the center o...

Page 37: ...61 100 5 0 60 Limits Gauss RMS Frequency KHz Figure 19 Magnetic flux density limits 6 1 3 Conductive noise The disk drive shall work without soft error degradation in the frequency range from DC to 2...

Page 38: ...65 0 65 0 9 Low Power Idle average 0 85 0 95 1 3 Active Idle average 1 85 1 85 2 0 Performance Idle average 3 20GB 10 GB 40GB 30 GB 60 GB Models Watts RMS Typical Footnotes 1 The maximum fixed disk r...

Page 39: ...20 30 40 60 Capacity GB Figure 21 Power consumption efficiency Note Power consumption efficiency is calculated as Power Consumption of Low Power Idle Watt Capacity GB 6 3 Start up Current Figure 22 Ty...

Page 40: ...Figure 23 Typical current wave form at start up of 40 GB model Figure 24 Typical current wave form at start up of 20 GB model Travelstar 60GH 40GN hard disk drive specifications 27...

Page 41: ...dition The drive is designed to be used under the following conditions The drive should be operated within specifications of shock vibration temperature humidity altitude and magnetic field The drive...

Page 42: ...coil The actuator velocity is greater than the normal case and the unload process is inherently less controllable without a normal seek current profile Emergency unload is intended to be invoked in r...

Page 43: ...power off on page 19 and section 5 2 Write Cache on page 19 6 4 6 4 Test considerations Start stop testing is classically performed to verify head disk durability The heads do not land on the disk so...

Page 44: ...100 2 0 25 69 85 0 25 9 5 0 2 40 GB 30 GB 155 Max 100 2 0 25 69 85 0 25 12 5 0 2 60 GB Weight gram Length mm Width mm Height mm Models Figure 25 Physical dimensions and weight 6 5 2 Mounting hole loca...

Page 45: ...l operate in all axes six directions and will stay within the specified error rates when tilted 5 degrees from these positions Performance and error rate will stay within specification limits if the d...

Page 46: ...at seek operation or spindle rotation 6 5 5 Load unload mechanism The head load unload mechanism is provided to protect the disk data during shipping movement or storage Upon power down a head unload...

Page 47: ...es of random vibration using the power spectral density PSD levels speci fied in C S 1 9711 002 1990 03 as V5L The vibration test level for V5L is 0 67 G RMS Root Mean Square 5 0 x E 4 500 5 0 x E 4 2...

Page 48: ...peak 10 to 500 to 10 Hz sine wave 0 5 oct min sweep rate 25 4 mm peak to peak displacement 5 to 10 to 5 Hz 6 6 3 Operating shock The hard disk drive meets the criteria in the table below while operat...

Page 49: ...s 120 G 700 G 60 GB Duration of 11 ms Duration of 1 ms Models Figure 32 Nonoperating shock The shocks are applied for each direction of the drive for three mutually perpendicular axes one axis at a ti...

Page 50: ...er tests are to be conducted with the drive supported by spacers so that the lower surface of the drive be located 25 3 mm above from the chamber floor No sound absorbing material shall be used The ac...

Page 51: ...e following formula only when determining compliance Lwt spec Lw 0 1Pt 0 3 4 0 Bels where Lw A weighted sound power level Pt Value of desecrate tone penalty dLt 6 0 dBA dLt Tone to noise ratio taken i...

Page 52: ...uitable enclosure and exercised with a random accessing routine at maximum data rate the drive meets the following worldwide electromagnetic compatibility EMC requirements United States Federal Commun...

Page 53: ...ed in this product are made of material with a UL recognized flammability rating of V 1 or better The flammability rating is marked or etched on the board All other parts not con sidered electrical co...

Page 54: ...g specified in Annex A Connectors and Cable Assembly of the ATA ATAPI 5 document The figure below and Figure 6 5 2 on page 31 show the connector location and physical pin location 43 44 22 Pin Pin 19...

Page 55: ...08 04 3 state I O DD07 03 GND 02 TTL I RESET 01 Type I O SIGNAL PIN Type I O SIGNAL PIN designates reserved pins which must be left unconnected reserved designates a power supply to the drive power de...

Page 56: ...DY Read Operation DIOW STOP DIOR HSTROBE IORDY DDMARDY Write Operation Conventional Definition Special Definition for Ultra DMA Figure 36 Special signal definitions for Ultra DMA Travelstar 60GH 40GN...

Page 57: ...bled only when the drive is selected and the host activates the IEN bit in the Device Control Register Otherwise this signal is in high impedance state regardless of the state of the IRQ bit The inter...

Page 58: ...level the drive works as a Slave The signal level of CSEL to one drive should be different from the signal level to another drive on the same AT interface cable to avoid master master or slave slave c...

Page 59: ...d by the host prior to initiation of an Ultra DMA burst A STOP shall be negated by the host before data is transferred in an Ultra DMA burst Assertion of STOP by the host during or after data transfer...

Page 60: ...Current 2 4 V min 0 5 V max Output High Voltage Output Low Voltage Outputs 2 0 V min 5 5 V max 0 5 V min 0 8 V max Input High Voltage Input Low Voltage Inputs 7 6 Reset timings t10 t1 RESET BUSY 25 R...

Page 61: ...id to IORDY active tRD 10 DIOR DIOW to address valid hold t9 30 Address valid to IOCS16 released t8 40 Address valid to IOCS16 assertion t7 30 DIOR data tristate t6z 5 DIOR data hold t6 20 DIOR data s...

Page 62: ...Q delay DIOW to DMARQ delay tLR tLW 25 DIOR negated pulse width DIOW negated pulse width tKR tKW 5 DIOR DIOW to DMACK hold tJ 0 DMACK to DIOR DIOW setup tI 10 DIOW data hold tH 20 DIOR DIOW data setup...

Page 63: ...0 10 10 10 10 Maximum time allowed for output drivers to release tAZ 38 57 86 115 154 230 Two cycle time t2CYC 16 8 25 39 54 73 112 Cycle time tCYC 90 120 0 130 0 170 0 200 0 230 0 First DSTROBE time...

Page 64: ...s MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE 1 MODE 0 PARAMETER DESCRIPTION Note When a host does not satisfy the tSR timing the host should...

Page 65: ...DS 20 20 20 20 20 20 Interlock time with minimum tMLI 20 20 20 20 20 20 Minimum delay time required for output tZAH 10 10 10 10 10 10 Maximum time allowed for output drivers to release tAZ 75 0 100 0...

Page 66: ...device tDS 20 20 20 20 20 20 Interlock time with minimum tMLI 20 20 20 20 20 20 Maximum delay time required for output tZAH 10 10 10 10 10 10 Maximum time allowed for output drivers to release tAZ 75...

Page 67: ...5 39 54 73 112 Cycle time tCYC 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 0 0 0 0 0 0 Minimum time before driving IORDY tZIORDY 55 20 55 20 55 20 70 20 70 20 70 20 Envelope time tEN...

Page 68: ...ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE 1 MODE 0 PARAMETER DESCRIPTION Note When a device does not satisfy the tSR timing the device i...

Page 69: ...evice tDH 4 5 7 7 10 15 CRC word setup time at device tDS 20 20 20 20 20 20 Interlocking time with minimum tMLI 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 85 100 100 100 125 160 Rea...

Page 70: ...rd hold time at device tDH 4 5 7 7 10 15 CRC word setup time at device tDS 20 20 20 20 20 20 Interlock time with minimum tMLI 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 50 50 50 50...

Page 71: ...Never attach a jumper here Setting 5 Never attach a jumper here When pin C is grounded the drive does not spin up at POR When the drive address is Cable Select the address depends on the condition of...

Page 72: ...ntrol Block registers The following table shows the I O address map Drive address Reg 1 1 1 0 1 Device control Reg Alt Status Reg 0 1 1 0 1 Control Block Registers Command Reg Status Reg 1 1 1 1 0 Dri...

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Page 74: ...Part 2 Interface specification Travelstar 60GH 40GN hard disk drive specifications 61...

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Page 76: ...ew functions included by ATA ATAPI 5 standards or newer standards Device Configuration Overlay The drive supports the following functions as Vendor Specific Functions Address Offset Feature Format Uni...

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Page 78: ...unless the prefailure attributes exceed their corresponding thres holds For example a Power On Hours Attribute never results in a negative reliability status S M A R T Return Status WRITE VERIFY comma...

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Page 80: ...Data bus high impedance x 0 1 A N Not used Data bus high impedance x x 0 A N Control block registers Not used Data bus high impedance x x x N N WRITE DIOW READ DIOR DA0 DA1 DA2 CS1 CS0 Functions Addr...

Page 81: ...p before writing to the Command Register 10 3 Cylinder High Register This register contains the high order bits of the starting cylinder address for any disk access At the end of the command this regi...

Page 82: ...when DRQ 1 is in the Status Register 10 6 Device Control Register 0 IEN SRST 1 0 1 2 3 4 5 6 7 Drive Control Register Figure 52 Device Control Register Bit Definitions Interrupt Enable When IEN 0 and...

Page 83: ...e This bit is not a device and will always be in a high impedance state HIZ 10 8 Device Head Register HS0 HS1 HS2 HS3 DRV 1 L 1 0 1 2 3 4 5 6 7 Device Head Register Figure 54 Device Head Register This...

Page 84: ...BRT ABT ID Not Found When IDN 1 it indicates that the requested sector s ID field could not be found IDNF IDN Uncorrectable Data Error When UNC 1 it indicates that an uncorrectable data error has been...

Page 85: ...the Status Register continuously Therefore the host should not attempt to use IDX bit for timing purposes IDX Corrected Data Always 0 CORR COR Data Request Bit DRQ 1 indicates that the device is read...

Page 86: ...Reset Software Reset The RESET signal is negated in the ATA Bus The device resets the interface circuitry and sets the default values Hard Reset Hardware Reset The device executes a series of electric...

Page 87: ...ce operation o o Aborting Host interface soft reset hard reset POR o execute x does not execute Notes Set according to the initial power mode selection 6 After reset the Standby timer value is set to...

Page 88: ...r Figure 58 Default Register Values If an Execute Device Diagnostic command is carried out if the system is powered on or if a hard reset oc curs the system generates an Error Register diagnostic code...

Page 89: ...bit DASP is asserted by Device 0 and Device 1 if it is present in order to indicate device active Soft Reset DASP is read by Device 0 to determine if Device 1 is present If Device 1 is pre sent Device...

Page 90: ...When the drive power is interrupted with the heads still loaded the microcode cannot operate and the normal 5V power is unavailable to unload the heads In this case normal unload is not possible so t...

Page 91: ...k media The drive supports both Logical CHS Addressing Mode and LBA Addressing Mode as the sector addres sing mode The host system may select either the currently selected CHS translation addressing o...

Page 92: ...the LBA address of a given logical sector does not change The following formula is always true LBA cylinder x heads_per_cylinder heads x sectors_per_track sector 1 where heads_per_cylinder and sector...

Page 93: ...ires a reset to be activated Sleep Mode 11 6 2 Power management commands The Check Power Mode command allows a host to determine if a device is currently in going to or leav ing standby mode The Idle...

Page 94: ...for Power Modes Each power mode affects the physical interface as defined in the following table Inactive No x x Sleep Inactive Yes 1 o Standby Active Yes 1 o Idle Active Yes x x Active Media Interfa...

Page 95: ...Standby state The IDENTIFY DEVICE response word 83 bit 3 indicates that Advanced Power Management feature is supported if set Word 86 bit 3 indicates that Advanced Power Management is enabled if set W...

Page 96: ...re Enable Advanced Power Management command The optimal time to enter Active Idle mode is variable depending on the recent behavior of the user It is not possible to achieve the same level of Power sa...

Page 97: ...s being used and the identity of these attributes is vendor specific and proprietary 11 8 2 Attribute values Attribute values are used to represent the relative reliability of individual performance o...

Page 98: ...Standby Immediate or Sleep command or Hard Reset but also by the automatic power saving functions like ABLE 3 or Standby timer So basically it is not necessary for a host system to enable the attribut...

Page 99: ...2 Security level The following security levels are provided When the device lock function is enabled and the User Password is forgotten then only the Master Password with a Security Erase Unit command...

Page 100: ...9 5 1 Master Password setting The system manufacturer or dealer can set an initial Master Password using the Security Set Password command without enabling the Device Lock Function 11 9 5 2 User Pass...

Page 101: ...Complete Complete Erase Unit Lock function Disable Normal operation All commands are available Freeze Lock command Enter Device Frozen mode Normal Operation expect Set Password Disable Password Erase...

Page 102: ...with Master Password Normal operation Figure 65 Password lost 11 9 5 5 Attempt limit for the SECURITY UNLOCK command The SECURITY UNLOCK command has an attempt limit the purpose of which is to preven...

Page 103: ...x Read Sector s o o o Read Native Max ADDRESS o o x Read Multiple o o x Read Long o o x Read DMA o o o Read Buffer o o o Initialize Device Parameters o o o Idle Immediate o o o Idle o o o Identify De...

Page 104: ...sholds o o o S M A R T Read Attribute Values o o o S M A R T Execute Off line Immediate o o o S M A R T Enable Operations o o o S M A R T Enable Disable Attribute Autosave o o o S M A R T Enable Disab...

Page 105: ...A range for protected area 1 032 192 0FC000h Customer usable sector count 528 482 304 bytes 528MB Customer usable device size 16 384 004000h Required blocks for protected area 8 388 608 bytes Required...

Page 106: ...o be used during the current power on cycle This password is not related to the password used for the Security Mode Feature set When the password is set the device is in the Set Max Unlocked mode This...

Page 107: ...mode The password the Set Max security mode and the unlock counter do not persist over a power cycle but persist over a hardware or software reset NOTE If this command is immediately preceded by a Re...

Page 108: ...ower on Defaults has been enabled by Set Features command it is cleared by Soft reset as well Upon entering offset mode the capacity of the drive returned in the Identify Device data is the size of th...

Page 109: ...in Address Offset mode 11 11 3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error even if the access protection is remov...

Page 110: ...ever the actual seek operation for the next seek command starts right after completion of the actual seek operation for the first seek command The execution of two seek commands overlaps excluding the...

Page 111: ...d is issued the operation to write the data from the cache buffer into the media is begun Power consumption can be reduced by Delayed Write When Write commands come with a long interval the device mus...

Page 112: ...overed write errors When a write operation can not be completed after the Error Recovery Procedure ERP is fully carried out the sector s are reallocated to the spare location An error is reported to t...

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Page 114: ...the host reads the Status Register issues a reset or writes to the Command Register See Section 14 0 Time out values on page 195 for the device time out values 12 1 Data In commands These commands ar...

Page 115: ...If the device detects an invalid parameter then it will abort the command by setting BSY 0 ERR 1 ABT 1 and interrupting the host If an error occurs the device will set BSY 0 ERR 1 and DRQ 1 The devic...

Page 116: ...has received the sector or block d When the device has finished processing the sector or block it sets BSY 0 and interrupts the host e In response to the interrupt the host reads the Status Register...

Page 117: ...location of the sector in error The error location will be reported with CHS mode or LBA mode The mode is decided by the mode select bit bit 6 of the Device Head register on issuing the command All da...

Page 118: ...e S M A R T Enable Disable Automatic Off line S M A R T Enable Operations S M A R T Execute Off line Immediate S M A R T Return Status S M A R T Save Attribute Values Standby Standby Immediate Executi...

Page 119: ...The DMA protocol allows high performance multitasking operating systems to eliminate processor over head associated with PIO transfers 1 The host initializes the Slave DMA channel 2 The host writes a...

Page 120: ...1 1 1 0 0 0 F8 Read Native Max ADDRESS 3 1 1 0 0 0 1 0 0 C4 Read Multiple 1 0 0 1 0 0 0 1 1 23 Read Long 1 0 0 1 0 0 0 1 0 22 Read Long 1 1 1 0 0 1 0 0 1 C9 Read DMA 4 1 1 0 0 1 0 0 0 C8 Read DMA 4 1...

Page 121: ...0 1 1 0 0 0 0 B0 S M A R T Read Attribute Thresholds 1 1 0 1 1 0 0 0 0 B0 S M A R T Read Attribute Values 1 1 0 1 1 0 0 0 0 B0 S M A R T Execute Off line Immediate 3 1 0 1 1 0 0 0 0 B0 S M A R T Enabl...

Page 122: ...ad Write Long 09 EF Enable Address Offset mode 05 EF Enable Advanced Power Management feature 03 EF Set Transfer mode 02 EF Enable Write Cache Set Features DB B0 S M A R T Enable Disable Automatic Off...

Page 123: ...be specified This bit is used by Set Max ADDRESS command V Valid This indicates that the bit is part of an output parameter and should be specified x This indicates that the hex character is not used...

Page 124: ...IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 75 Check Power Mode command E5h 98h The Check Power Mode command will repo...

Page 125: ...Device Configuration Overlay feature set commands are identified by the value placed in the Features register The table below shows these Features register values Reserved other DEVICE CONFIGURATION...

Page 126: ...to reduce the set of optional commands modes or feature sets supported by a device as indicated by a DEVICE CONFIGURATION IDENTIFY command The DEVICE CONFIGURATION SET command transfers an overlay tha...

Page 127: ...d 1 1 Ultra DMA mode 2 and below are supported 2 1 Ultra DMA mode 3 and below are supported 3 1 Ultra DMA mode 4 and below are supported 4 1 Ultra DMA mode 5 and below are supported 5 Reserved 15 6 Ul...

Page 128: ...empt to disable any feature enabled 04h Device s feature is already modified with DCO 03h Device is now Security Locked mode 02h DCO feature is frozen 01h error reason code description Sector count in...

Page 129: ...gister Error Register Figure 80 Enable Disable Delayed Write command FAh The Enable Disable Delayed Write command sets if the Delayed Write function is enabled or disabled Delayed Write function is en...

Page 130: ...V V V V V V V 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 81 Execute Device Diagnostic command 90h The Execute D...

Page 131: ...rs Command Block Output Registers V 0 V 0 V 0 0 0 V 0 0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 82 Flush...

Page 132: ...oes not verify the correct initialization of the data sector Any data previously stored on the track will be lost Output parameters to the device Sector Number In LBA mode this register specifies that...

Page 133: ...rmation are available right after the completion of this command They are also used on the next power on reset or hard reset This command erases both previous information data from the device Note tha...

Page 134: ...this command is shown below 12 min IC25N010ATCS04 22 min IC25N020ATCS04 34 min IC25N030ATCS04 44 min IC25N040ATCS04 60 min IC25T060ATCS05 Execution time Model number Travelstar 60GH 40GN hard disk dri...

Page 135: ...ock Input Registers Command Block Output Registers V 0 0 V 0 0 0 V 0 0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register F...

Page 136: ...and is not required to spin up and IDENTIFY DEVICE response is complete C837H 02 Number of cylinders in default translate mode Note 1 01 Reserved 0 0 1 hard sectored 1 1 1 identify data incomplete 2 0...

Page 137: ...nt cylinders XXXXH 54 Validity flag of the word 15 3 0 Reserved 2 1 1 Word 88 is Valid 1 1 1 Word 64 70 are Valid 0 1 1 Word 54 58 are Valid 0007H 53 DMA data transfer cycle timing mode Refer Word 62...

Page 138: ...d 0000H 69 79 Minimum PIO Transfer Cycle Time With IORDY Flow Control 15 0 78h Cycle time in nanoseconds 120 ns 16 6 MB s 0078H 68 Minimum PIO Transfer Cycle Time Without Flow Control 15 0 F0h Cycle t...

Page 139: ...error logging supported 4003H 84 Command set supported 15 0 Always 14 1 Always 13 12 0 Reserved 11 1 1 Device Configuration Overlay command supported 10 9 0 Reserved 8 1 1 SET MAX security extension...

Page 140: ...Command set feature enabled 15 0 Always 14 1 Always 13 2 0 Reserved 1 1 1 SMART self test supported 0 1 1 SMART error logging supported 4003H 87 Command set feature enabled 15 12 0 Reserved 11 1 1 Dev...

Page 141: ...00 Reserved 01 a jumper was used 10 the CSEL signal was used 11 some other method used or method unknown 8 1 Always 7 0 Device 0 hardware reset result Device 1 clears these bits to 0 7 0 Reserved 6 X...

Page 142: ...Power Mode 1 Standby 0 Idle 000XH 131 Reserved XXXXH 130 Current Set Feature Option Bit assignments 15 4 0 Reserved 3 X 1 Auto reassign enabled 2 X 1 Reverting enabled 1 X 1 Read Look ahead enabled 0...

Page 143: ...heads 3FFFh Number of cylinders IC25N030ATCS04 0 4A85300h Total number of user addressable sectors 0DD0h 1 768KB Buffer size 10h Number of heads 3FFFh Number of cylinders IC25N040ATCS04 0 6FC7C80h To...

Page 144: ...t parameter standby timer the point timer starts counting down When the power save mode is already any idle mode the device remains in that mode When the Idle mode is entered the device is spun up to...

Page 145: ...RR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 95 Idle Immediate command E1h 95h The Idle Immediate command causes the...

Page 146: ...nitialize Device Parameters command enables the host to set the number of sectors per track and the number of heads minus 1 per cylinder Words 54 58 in Identify Device Information reflects these param...

Page 147: ...DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 97 Read Buffer command E4h The Read Buffer command transfers a sector of data from the sect...

Page 148: ...issuing the command The data transfers are qualified by the DMARQ and are performed by the slave DMA channel The device issues only one interrupt per command to indicate that the data transfer has te...

Page 149: ...or L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the cu...

Page 150: ...ed the device will keep setting DRQ 1 to indicate that the device is ready to transfer the ECC bytes to the host The data is transferred 16 bits at a time and the ECC bytes are transferred 8 bits at a...

Page 151: ...f the transferred sector L 0 In LBA mode this register contains current LBA bits 8 15 Low 16 23 High L 1 H This indicates the head number of the transferred sector L 0 In LBA mode this register contai...

Page 152: ...ansfers the data from the device to the host The sectors are transferred through the Data Register 16 bits at a time The command execution is identical to the Read Sectors command with one exception a...

Page 153: ...ctor L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the...

Page 154: ...d the native max LBA CYL is returned Output parameters to the device L LBA mode This indicates the addressing mode L 0 specifies CHS mode and L 1 specifies the LBA addressing mode D This is the device...

Page 155: ...V Valid Indicates that the bit is part of an input parameter and will be set to 0 or 1 by the device This indicates that the bit is not used Travelstar 60GH 40GN hard disk drive specifications 142...

Page 156: ...f data from disk media and then transfers the data from the device to the host The sectors are transferred through the Data Register 16 bits at a time If an uncorrectable error occurs the read will be...

Page 157: ...tor L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This is the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current...

Page 158: ...st The difference between the Read Sectors command and Read Verify Sectors command is that data is transferred to the host during a Read Sectors command and data is not transferred to the host during...

Page 159: ...ector L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This is the cylinder number of the last transferred sector L 0 In LBA mode this register contains the curren...

Page 160: ...nd Block Input Registers Command Block Output Registers V 0 V 0 V 0 0 V V 0 0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Reg...

Page 161: ...ing information specified in Figure 106 The device then checks the transferred password If the User Password or Master Password matches the given password the device disables the security mode feature...

Page 162: ...0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 107 Security Erase Prepare command F3h The Security Erase Prep...

Page 163: ...e Unit command initializes all user data sectors and then disables the device lock function Note that the Security Erase Unit command initializes from LBA 0 to Native MAX LBA The Host MAX LBA is set b...

Page 164: ...curity erase prepare command should be completed immediately prior to the Security Erase Unit command If the device receives a Security Erase Unit command without a prior Security Erase Prepare comman...

Page 165: ...AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 110 Security Freeze Lock command F5h The Security Freeze Lock Command allows the device to enter froze...

Page 166: ...mmand F1h The Security Set Password command enables the security mode feature device lock function and sets the master password or the user password The security mode feature device lock function is e...

Page 167: ...on Code is not set The Revision Code field is returned in Identify Device word 92 The valid Revision Codes are 0000h to FFFDh The Default Master Password Revision Code is FFFEh The code FFFFh is reser...

Page 168: ...the device will be in device lock mode The password has not been changed yet The Security Unlock command requests to transfer a single sector of data from the host including infor mation specified in...

Page 169: ...the device regards Password as the Master Password The user can detect if the attempt to unlock the device has failed due to a mismatched password since this is the only reason that an abort error wil...

Page 170: ...e designated track and selects the designated head The device does not need to be formatted for a seek to execute properly Output parameters to the device Sector Number In LBA mode this register speci...

Page 171: ...to sense temperature in a device This command is executable without spinning up even if a device is started with No Spin Up option If this command is issued at the temperature out of range which is s...

Page 172: ...T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 117 Set Features command EFh The Set Feature command establishes the following parameters which affect th...

Page 173: ...100 PIO Flow Control Transfer Mode x 00001 nnn 00000 001 PIO Default Transfer Mode Disable IORDY 00000 000 PIO Default Transfer Mode When the Feature register is 05h Enable Advanced Power Management t...

Page 174: ...A CYL which is set via this command as a default value This command implement SET MAX security extension commands as subcommands But regardless of Feature register value the case this command is immed...

Page 175: ...15 Low and bits 16 23 High which are to be set L 1 H In LBA mode this register contains LBA bits 24 27 which are to be input L 1 In CHS mode this register is ignored L 0 L This indicates the LBA addr...

Page 176: ...the device to perform Read and Write Multiple commands and establishes the block size for these commands The block size is the number of sectors to be transferred for each interrupt The default block...

Page 177: ...4 5 6 7 Status Register Error Register Figure 120 Sleep command E6h 99h This command is the only way to cause the device to enter Sleep Mode When this command is issued the device confirms the comple...

Page 178: ...be used for logging and reporting purposes and to accommo date special user needs The S M A R T Function Set command has several separate subcommands which are selectable via the device s Features Reg...

Page 179: ...Autosave feature either enabled or disabled will be preserved by the device across the power cycle A value of 00h written by the host into the device s Sector Count Register before issuing the S M A...

Page 180: ...start its routine depending on the interrupting command Captive mode When executing self test in captive mode the device sets BSY to one and executes the specified self test routine after receipt of t...

Page 181: ...the S M A R T Disable Operations command will be preserved in the device s Attribute Data Sectors If the device is re enabled these Attribute Values will be updated as needed upon receipt of a S M A...

Page 182: ...ine data collection activities which is initiated by the S M A R T Execute Off line Immediate Subcommand D4h or automatically if the off line read scanning feature is disabled A value of F8h written b...

Page 183: ...bility 0003h 1 170h 2 S M A R T capability 1Bh 1 16Fh 1 Off line data collection capability 2 1 16Eh 1 Current segment pointer 2 1 16Ch 2 Total time in seconds to complete off line data collection act...

Page 184: ...ry bit flags 01h 2 Status Flags binary 00h 1 Attribute ID Number 01h to FFh Value Offset Byte Description Figure 124 Individual Attribute Data Structure Attribute ID Numbers Any nonzero value in the A...

Page 185: ...pare with the Threshold values A Threshold is the excursion limit for a normalized Attribute Value In normalizing the raw data the device will perform any necessary statistical validity checks to ensu...

Page 186: ...re 5 The self test routine was completed with an electrical element failure 6 The self test routine was completed with a servo element failure 7 The self test routine was completed with a read element...

Page 187: ...e S M A R T ENABLE DISABLE ATTRIBUTE AUTOSAVE command Bit Definition 0 Pre power mode attribute saving capability If bit 1 the device will save its Attribute Values prior to going into a power saving...

Page 188: ...active Attribute Thresholds will appear in the same order as their corresponding Attribute Values 512 2 1FFh 1 Data structure checksum 3 17Ch 131 Vendor specific 3 16Ah 18 Reserved 2 1 15Eh 12 30th D...

Page 189: ...de test purposes binary 01h 1 Attribute Threshold for comparison with Attribute Values from 00h to FFh binary 00h 1 Attribute ID Number 01h to FFh Format Offset Byte Description Figure 127 Individual...

Page 190: ...te Description Figure 128 S M A R T error log sector 13 32 4 1 S M A R T error log version This value is set to 01h 13 32 4 2 Error log pointer This points to the most recent error log data structure...

Page 191: ...h 1 Command register 06h 1 Device Head register 05h 1 Cylinder High register 04h 1 Cylinder Low register 03h 1 Sector number register 02h 1 Sector count register 01h 1 Features register 00h 1 Device C...

Page 192: ...1 Sector number register 02h 1 Sector count register 01h 1 Error register 00h 1 Reserved Offset Byte Description Figure 131 Error data structure State field contains a value indicating the device stat...

Page 193: ...execution status n 18h 02h 1 Self test number 00h 2 Data structure revision Offset Byte Description Note N is 0 through 20 Figure 132 Self test log data structure The data structure contains the desc...

Page 194: ...subcommand other than S M A R T ENABLE OPERATIONS was received by the device while the device was in a S M A R T Disabled state 04h 51h A S M A R T FUNCTION SET command was re ceived by the device wit...

Page 195: ...e it asserts the INTRQ Following the INTRQ the interface remains active and the device is spun down If the device is already spun down the spin down sequence is not executed During the Standby mode th...

Page 196: ...Register Figure 135 Standby Immediate command E0h 94h The Standby Immediate command causes the device to enter the Standby mode immediately When this command is issued the device confirms the completi...

Page 197: ...0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 136 Write Buffer command E8h The Write Buffer command transfer...

Page 198: ...gh the Data Register16 bits at a time The host initializes a slave DMA channel prior to issuing the command Data transfers are qualified by DMARQ and are performed by the slave DMA channel The device...

Page 199: ...umber of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA...

Page 200: ...to the device then the data and the ECC bytes are written to the disk media After 512 bytes of data have been transferred the device will keep setting DRQ 1 to indicate that the device is ready to rec...

Page 201: ...he sector to be transferred L 0 In LBA mode this register contains current the LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the sector to be transferred L 0 In LBA mod...

Page 202: ...is then written to the disk media Command execution is identical to the Write Sectors command except that an interrupt is generated for each block as defined by the Set Multiple command instead of for...

Page 203: ...d sector L 0 In LBA mode this register contains current the LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains...

Page 204: ...is then written to the disk media The sectors are transferred through the Data Register 16 bits at a time If an uncorrectable error occurs the write will be terminated at the failing sector when the...

Page 205: ...d sector L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains...

Page 206: ...e drive the Write Verify command is exactly the same as the Write Sectors command 30h Read verification is not performed after the write operation Refer to 13 39 Write Sectors Command on page 191 for...

Page 207: ...This page intentionally left blank...

Page 208: ...Out Command 10 s Status Register BSY 1 256th Read From Data Register Device Busy After Data Transfer In 30 sec Status Register BSY 0 and DRQ 1 Interrupt Status Register BSY 1 Interrupt DRQ For Data T...

Page 209: ...to 13 22 Security Erase Unit F4h on page 150 Note 2 For FORMAT UNIT command the execution time is referred to 13 7 Format Unit F7h Vendor Specific on page 120 Note 3 When the initial power mode at po...

Page 210: ...s INITIALIZE DEVICE PARAMETERS 91h Mandatory Yes EXECUTE DEVICE DIAGNOSTIC 90h Optional No CFA TRANSLATE SECTORS 87h Mandatory Yes SEEK 7xh Obsoleted Yes FORMAT TRACK 50h Obsoleted Yes READ VERIFY SEC...

Page 211: ...EEP E6h Mandatory Yes CHECK POWER MODE E5h Optional Yes READ BUFFER E4h Mandatory Yes IDLE E3h Mandatory Yes STANDBY E2h Mandatory Yes IDLE IMMEDIATE E1h Mandatory Yes STANDBY IMMEDIATE E0h Optional N...

Page 212: ...r on defaults CCh Yes Set 4 bytes ECC BBh Yes Enable read look ahead feature AAh No Enable Media Status Notification 95h Yes Disable Address Offset mode 89h Yes Disable Advanced Power Management 85h Y...

Page 213: ...from Travelstar 48GH 30GN 15GN The Travelstar 60GH 40GN has changed one feature present in the Travelstar 48GH 30GN 15GN The identify device information data Travelstar 60GH 40GN hard disk drive speci...

Page 214: ...curity Freeze Lock F5h 152 Security Set Password F1h 153 Security Unlock F2h 155 Seek 7xh 157 Set Features EFh 159 Set Max ADDRESS F9h 161 Set Multiple C6h 163 Sleep E6h 99h 164 Standby E2h 96h 182 St...

Page 215: ...Register Set 67 Reset Diagnostic and reset considerations 76 Register initialization 75 Reset error register values 76 Reset timings 47 S S M A R T S M A R T operation with power management modes 85 S...

Page 216: ...mmand completion timing 80 T Table of signals 42 Time out interval 131 Time out Parameter 131 132 Time out values 195 U User Password 86 V Vibration 34 W Write Buffer 103 184 Write Cache 19 98 Write D...

Page 217: ...ed IBM is a registered trademark of International Business Machines Corporation Other company product and service names may be trademarks or service marks of others Product description data represents...

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