EM78P809N
8-Bit Microcontroller
Product Specification
(V1.0) 07.26.2005
•
23
(This specification is subject to change without further notice)
4.3 Special Purpose Registers
A (Accumulator)
Internal data transfer, or instruction operand holding.
It cannot be addressed.
CONT (Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WDTO /INT WDTP1
WDTP0
WDTE PSR2 PSR1 PSR0
CONT register is both readable and writable.
Bit 7 ( WDTO ) :
WDT output select
WDTO = “0” :
Interrupt request
WDTO = “1” :
Internal reset
Bit 6 ( /INT ) :
Interrupt enable flag
/INT = “0” :
masked by DISI or hardware interrupt
/INT = “1” :
enabled by ENI/RETI instructions
Bit 5 ~ Bit 4 ( WDTP1 ~ WDTP0 )
: WDT prescaler bits.
WDTP1
WDTP0
Operating Mode
0 0 1:4
0 1
1:16
1 0
1:64
1 1
1:256
Bit 3 ( WDTE ) :
WDT enable control.
WDTE = “0” :
Disable
WDTE = “1” :
Enable
Bit 2 ( PSR2 ) ~ Bit 0 ( PSR0 )
: TCC prescaler bits.
PSR2
PSR1
PSR0
Operating Mode
0 0 0 1:2
0 0 1 1:4
0 1 0 1:8
0 1 1
1:16
1 0 0
1:32
1 0 1
1:64
1 1 0
1:128
1 1 1
1:256