7.9 Ultra DMA timings
The Ultra DMA timings meet Mode 0, 1, 2, 3, and 4 of the Ultra DMA Protocol.
7.9.1
Initiating Read DMA
DSTROBE
HDMARDY-
DMACK-
DMARQ
STOP
tUI
tACK
tENV
tACK
tENV
tZIORDY
tFS
tCYC
t2CYC
DD(15:0)
tZAD
tAZ
xxxxxxxxxxxxxxxxxxxxxxxxxxx
xxx
xxxx
xxx
Host drives DD
Device drives DD
tDH
tDS
RD Data
RD Data
RD Data
tCYC
–
5
–
5
–
5
–
5
–
5
Data hold time at host
tDH
–
5
–
7
–
7
–
10
–
15
Data setup time at host
tDS
–
0
–
0
–
0
–
0
–
0
Drivers to assert
tZAD
10
–
10
–
10
–
10
–
10
–
Maximum time allowed for output drivers
to release
tAZ
–
57
–
86
–
115
–
154
–
230
Two cycle time
t2CYC
–
25
–
39
–
54
–
73
–
112
Cycle time
tCYC
120
0
130
0
170
0
200
0
230
0
First DSTROBE time
tFS
–
0
–
0
–
0
–
0
–
0
Minimum time before driving IORDY
tZIORDY
55
20
55
20
70
20
70
20
70
20
Envelope time
tENV
–
20
–
20
–
20
–
20
–
20
Setup time for DMACK-
tACK
–
0
–
0
–
0
–
0
–
0
Unlimited interlock time
tUI
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MODE 4
MODE 3
MODE 2
MODE 1
MODE 0
PARAMETER DESCRIPTION
Figure 38. Ultra DMA cycle timing
(Initiating Read)
Travelstar 32GH/30GT/20GN hard disk drive specifications
49
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