Write Sectors
Write Verify
Execution includes the transfer of one or more 512 byte ( > 5 1 2 bytes on Write Long) sectors of data from
the host to the device.
1. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and
Device/Head Registers.
2. The host writes the command code to the Command Register.
3. The device sets B S Y = 1 .
4. For each sector (or block) of data to be transferred:
a. The device sets B S Y = 0 and D R Q = 1 when it is ready to receive a sector (or block).
b. The host writes one sector (or block) of data via the Data Register.
c. The device sets B S Y = 1 after it has received the sector (or block).
d. When the device has finished processing the sector (or block), it sets B S Y = 0 , and interrupts the
host.
e. In response to the interrupt, the host reads the Status Register.
f. The device clears the interrupt in response to the Status Register being read.
5. For the Write Long command:
a. The device sets B S Y = 0 and D R Q = 1 when it is ready to receive a sector.
b. The host writes one sector of data including ECC bytes via the Data Register.
c. The device sets B S Y = 1 after it has received the sector.
d. After processing the sector of data the device sets B S Y = 0 and interrupts the host.
e. In response to the interrupt, the host reads the Status Register.
f. The device clears the interrupt in response to the Status Register being read.
The Write Multiple command transfers one block of data for each interrupt. The other commands transfer
one sector of data for each interrupt.
If the device detects an invalid parameter, then it will abort the command by setting B S Y = 0 , E R R = 1 ,
A B T = 1 , and interrupting the host.
If an uncorrectable error occurs, the device will set B S Y = 0 and E R R = 1 , store the error status in the Error
Register, and interrupt the host. The registers will contain the location of the sector in error. The errored
location will be reported with CHS mode or LBA mode. The mode is decided by mode select bit (bit 6) of
Device/Head register on issuing the command.
All data transfers to the device through the Data Register are 16 bits, except for the ECC bytes, which are 8
bits.
Command Protocol
91
Summary of Contents for DBCA-204860 - Travelstar 4.8 GB Hard Drive
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Page 15: ...Part 1 Functional Specification Copyright IBM Corp 1998 7...
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Page 61: ...Part 2 ATA Interface Specification Copyright IBM Corp 1998 53...
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Page 190: ...Published in Japan S25L 2426 02...