IMPORTANT:
Always refer to the PCI card's manufacturer for the specific PCI card performance
specifications. PCI, PCI-X mode 1, and PCI-X mode 2 cards are supported at different clock
speeds. Select the appropriate PCI-X I/O slot for best performance.
Table 1-8 PCI-X Slot Types
PCI Mode Supported
Supported Cards
Ropes
Maximum Peak
Bandwidth
Maximum MHz
Slot
1
I/O Partition
PCI or PCI-X Mode
1
3.3 V
001
533 MB/s
66
8
2
0
PCI or PCI-X Mode
1
3.3 V
002/003
1.06 GB/s
133
7
PCI-X Mode 2
3.3 V or 1.5 V
004/005
2.13 GB/s
266
6
PCI-X Mode 2
3.3 V or 1.5 V
006/007
2.13 GB/s
266
5
PCI-X Mode 2
3.3 V or 1.5 V
014/015
2.13 GB/s
266
4
PCI-X Mode 2
3.3 V or 1.5 V
012/013
2.13 GB/s
266
3
PCI or PCI-X Mode
1
3.3 V
010/011
1.06 GB/s
133
2
PCI or PCI-X Mode
1
3.3 V
008/009
1.06 GB/s
133
1
PCI or PCI-X Mode
1
3.3 V
001
533 MB/s
66
8
2
1
PCI or PCI-X Mode
1
3.3 V
002/003
1.06 GB/s
133
7
PCI-X Mode 2
3.3 V or 1.5 V
004/005
2.13 GB/s
266
6
PCI-X Mode 2
3.3 V or 1.5 V
006/007
2.13 GB/s
266
5
PCI-X Mode 2
3.3 V or 1.5 V
014/015
2.13 GB/s
266
4
PCI-X Mode 2
3.3 V or 1.5 V
012/013
2.13 GB/s
266
3
PCI or PCI-X Mode
1
3.3 V
010/011
1.06 GB/s
133
2
PCI or PCI-X Mode
1
3.3 V
008/009
1.06 GB/s
133
1
1
Each slot will auto select the proper speed for the card installed up to the maximum speed for the slot. Placing high
speed cards into slow speed slots will cause the card to be driven at the slow speed.
2
Slot is driven by a single rope and has a maximum speed of 66 MHz.
PCIe Backplane
The 16–slot (8 PCI and PCI-X; 8 PCI-Express) mixed PCI-X/PCI-Express (“PCIe”) I/O backplane
was introduced for the Dual-Core Intel
®
Itanium
®
processor 9100 Series release and is heavily
leveraged from the PCI-X backplane design. Only the differences will be descibed here. See
“PCI/PCI-X I/O Subsystem” (page 24)
for common content between the two boards..
The PCI-Express I/O backplane comprises two logically independent I/O circuits (partitions) on
one physical board.
•
The I/O chip in cell location zero (0) and its associated four PCI-X ASICs, four PCIe ASICs,
and their respective PCI/PCI-X/PCIe slots form PCI-Express I/O partition 0 plus core I/O.
•
The I/O chip in cell location one (1) and its associated four PCI-X ASICs, four PCIe ASICs,
and their respective PCI/PCI-X/PCIe slots form PCI-Express I/O partition 1 plus core I/O.
Detailed Server Description
27
Summary of Contents for Integrity rx8640
Page 6: ...6 ...
Page 8: ...8 ...
Page 32: ...32 ...
Page 43: ...Figure A 3 Planning Grid Computer Room Layout Plan 43 ...
