Appendix D: Glossary
Table D-1.
Common acronyms used in this document
Term Definition
ASCII
Acronym for the American Standard Code for Information Interchange. ASCII is a code for
representing English characters as numbers, with each letter assigned a number from 0 to
127. Most computers use ASCII codes to represent text, which makes it possible to transfer
data from one computer to another. (Source: www.pcwebopedia.com)
ASIC
Application
-specific integrated circuit (a custom-designed chip).
Boolean XOR
Boolean values are either true or false. The XOR, or exclusive-or operator, returns TRUE when
comparing other values and only one of the other values is TRUE. If more than one other
value is TRUE or if all other values are FALSE, then the Boolean XOR operator returns FALSE.
CA
Certificate Authority. A trusted third-party organization or company that issues digital
certificates used to create digital signatures and public-private key pairs. (Source:
www.pcwebopedia.com).
CPU
Central processing unit
IP
Internet protocol. This term is used synonymously with IP address, or the numerical
representation of a network node that supports IP. IP addresses consist of four “octets”
separated by dots; for example, 192.168.1.1.
MAC
Media access control. The MAC layer is a sublayer of the data-link layer in the OSI model of
network communication. In the Ethernet standard, every network connection must support a
unique MAC value.
NIC
Network interface controller
NVRAM Non-volatile
random-access
memory. This is memory that maintains data across power
cycles.
OSI model
OSI stands for Open System Interconnection, a seven-layer protocol model for defining a
networking framework.
PCI
Peripheral component interconnect. The industry-standard interconnect for input/output
devices.
PKI
Public Key Infrastructure. A system of digital certificates, Certificate Authorities, and other
registration authorities that verify and authenticate the validity of each party involved in an
Internet transaction. (Source:
www.webopedia.com
).
POST
Power-On Self-Test. The series of steps that the host system CPU performs following power-on.
Steps include testing memory, initializing peripherals, and executing option ROMs.
Following POST, the host ROM passes control to the installed operating system.
RISC
Reduced instruction-set computing. A type of processor representing a simple set of
instructions that can be run at very high speeds. The alternative CISC processor, or Complex
instruction-set computing processor, can perform powerful instructions that generally run at
slower speeds.
ROM Read-only
memory
SDRAM Synchronous
dynamic random access memory
SNMP
Simple Network Management Protocol. A set of protocols for managing complex networks.
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