AN-6131API
5
Holt Integrated Circuits
Hardware Design Overview
Separate schematics and BOM’s documents are included on the Holt CD-ROM.
The detachable HI-6131 board can be separated from the provided MCU board for connection to a user-
supplied alternate microprocessor or FPGA board. The inter-board headers are located on 0.1” (2.54 mm)
grid for compatibility with generic prototyping boards. All host interface signals go through the inter-board
headers. Numerous HI-6131 configuration pins (and the Remote Terminal address setting pins) are
controlled by DIP switches on the upper HI-6131 board; these signals are not available on the inter-board
headers.
The lower ARM Cortex M3 board is based on the flash-programmable Atmel AT91SAM3U-EK
microprocessor. A 4-signal Serial Peripheral Interface (SPI) clocked at 16MHz (20MHz is possible) connects
to the HI-6131. A UART-based serial port provides RS-232 console I/O (optional). An uncommitted USB
2.0 port is available for future expansion. Two pushbuttons are available for software interaction. A RESET
pushbutton resets the ARM microprocessor, which in turn controls the HI-6131 Master Reset signal.
The ARM Cortex M3 board includes “J-Link On Board” debug interface, licensed from www.segger.com,
providing out-of-box readiness without having to buy a costly JTAG debug cable. The kit includes a simple
USB cable for connecting the board’s debug interface to your computer. (For users already owning an
ARM debug interface with ribbon-cable connector, an ARM-standard 2x10 debug connector provides
debug connectivity. In this case, jumper JP2 on the bottom of the lower board should be soldered closed
to disable “J-Link On Board”.)
The 64K serial EEPROM is not demonstrated on this kit. For information on the AUTO initialization feature
of the HI-6131 using the EPPROM see document AN-6131.pdf for the non Holt API version of the demo kit
software.
Holt API Host Memory Considerations
Holt API uses C malloc() functions to allocate memory from ARM Cortex M3 internal SRAM for API host
buffers. The total amount of SRAM available on the selected Atmel ARM Cortex M3 MCU is 48K bytes.
This SRAM is shared for all C code static, dynamic variables including the stack and heap. The 48K bytes
are adequate for the demonstrations in this software. User SRAM requirements depend on number of
enabled 1553 terminal modes and buffer size(s) needed for the application.
If more memory is required, choose a processor with more SRAM or augment the processor with external
SRAM. The Holt ADK-6130-2 board is an example that uses the same Atmel ARM Cortex M3 processor
with an additional 256K byte external SRAM memory. See AN-6130-2.pdf for this example. Note: The ADK-
6130-2 uses a Holt HI-6130 protocol IC with parallel bus interface (not SPI) and the SRAM memory
expansion also uses the MCU external bus interface.
