HMS Ixxat iPC-I 320, Hardware Manual

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Architecture
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iPC-I 320 Manual, Version 2.8
4.3 Triggering an Interrupt on the PC
The microcontrollers can trigger an interrupt on the PC by writing a low impulse
of min. 50ns length onto the port pin 1.7. The electronics on the interface convert
this into an impulse of approx. 1.5 µs length (triggering occurs on the falling side
of the impulse of the port pin). The requested interrupt on the PC side is set with
the jumper JP27, the level of the impulse with switch 7 of the DIP switch SW1
(see Section 4.1.2).
4.4 CAN Controllers
Up to two CAN controllers can be present on the interface. These can be
controllers of the types Philips SJA1000 or INTEL 82527. With the PC/104
version, the first CAN controller is always a Philips SJA1000, the second CAN
controller can be assembled via an optional plug-in circuit board.
The first CAN controller is displayed in the range from F400h to F7FFh, the
second CAN controller in the range from F800h to FBFFh in the XDATA area of
the microcontroller. When the individual storage area is accessed, the
corresponding CAN controller is automatically selected. The exact registration
description can be found in the relevant data books of INTEL or Philips (web-
addresses in Appendix C). Both CAN controllers have a frequency of 16 MHz.
CAN controller Start
address
INT on
DS80C320
HW reset
with port
TX0
disable
with port
1. CAN controller F400h INT0 P1.0 P1.5
2. CAN controller F800h INT1 P1.1 P1.6
The CAN controllers are reset by a high-level (bit on 1) of the port bits to P1.0
and P1.1 respectively. After reset of the microcontroller, it should be ensured
that the two CAN controllers are in reset mode. The application on the interface
must ensure that the two port bits are set to 0.
It is possible, with a high level (bit on 1) of the port bits 1.5 and 1.6, to prevent
the INTEL 82527 CAN controller from transmitting. For this, the TX0 line of the
CAN controller to the bus coupling is interrupted. After a reset of the
microcontroller, it is the task of the application to set the bit to 0, in order to
enable transmission.
It should be ensured that the Output Control Register of the Philips SJA1000
CAN controller is loaded with the value 5Eh. To ensure correct functioning of
the INTEL 82527 CAN controller, the value 41h must be written in the CPU
interface register of the INTEL 82527 after each reset of the CAN controller.
Since the INTEL 82527 CAN controller has a relatively slow CPU interface, it is
necessary to insert wait states when accessing the CAN controller. The DALLAS
DS80C320 microcontroller has the CKCON register (SFR Register 8Eh) for this
purpose. The value 100b must be entered in bits 2, 1 and 0 of the CKCON