27
12.
CameraLink output timing chart
12.1
Horizontal timing
12.2
Transmitter LVDS output pulse position measurement
(1) Base Configuration
(a) 24bit
D.OUT 1
N.U.: Not used
When using at Base configuration, please be sure to connect CameraLink cable to D.OUT 1. If the cable is connected to
D.OUT 2, machine may break down.
Previous Cycle
T
CLK
22.2ns (45.0000MHz)
R7-1
R6-1
N.U.
B7
B6
G7
G6
R7
R6
B3-1
B2-1
N.U.
FVAL
LVAL
B5
B4
B3
B2
G2-1
G1-1
B1
B0
G5
G4
G3
G2
G1
R1-1
R0-1
G0
R5
R4
R3
R2
R1
R0
X3
X2
X1
X0
CLKX
Next Cycle
VIDEO
Active Picture
LVAL
1512 clk
1280 clk
1CLK= 22.2 ns
Summary of Contents for HV-F130SCL
Page 48: ...36 17 Dimensions ...