Hitachi H8/300L Series, Programming Manual

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1.1.2 Data Structure
The H8/300L CPU can process 1-bit data, 4-bit (packed BCD) data, 8-bit (byte) data, and 1 6-bit
(word) data.
•
Bit manipulation instructions operate on 1-bit data specified as bit n (n = 0, 1, 2, ..., 7) in a
byte operand.
•
All operational instructions except ADDS and SUBS can operate on byte data.
•
The MOV.W, ADD.W, SUB.W, CMP.W, ADDS, SUBS, MULXU (8 bits
×
8 bits), and
DIVXU (16 bits
÷
8 bits) instructions operate on word data.
•
The DAA and DAS instruction perform decimal arithmetic adjustments on byte data in
packed BCD form. Each 4-bit of the byte is treated as a decimal digit.
Data Structure in General Registers: Data of all the sizes above can be stored in general
registers as shown in figure 1-1.
Data type Register No. Data format
1-Bit data RnH
Don't - care 7 6 5 4 3 2 1 0
0 7
1-Bit data RnL
0 7
6 7 4 5 2 3 0 1
Don't - care
Byte data RnH 0 7
Don't - care
M
S
B L
S
B
Byte data RnL
Don't - care
7 0
M
S
B L
S
B
Word data Rn
15 0