Hitachi DV-C4, Service Manual

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A B C D E F G H
A B C D E F G H
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DATE: TEC-HQ
TEC-HQ SEC. PUBRICATION:
DISTRIBUTE:
SECTION:
ORION ELECTRIC CO.LTD
DWG.NO.
FUNCTION
CHKD BY
DET.CHKD BY
DRAWN BY
DESIGN BY
: ISSU
Rev.No:
PCB NAME
STANDARD
MODEL
DESCRIPTION
VMX212A_D
3.0
M2A1-11A
DV-C4
PAL/NTSC
M2A1
T.SARAWUT
S.PRATUAN
IRAM
IC4002 HY57V161610DTC-8
S-DRAM
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25 26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
43
44
45
46
47
48
49
5
50
6
7
8
9
B4002
N2012ZP600T25
C4020
47
6.3V
KA
C4019
0.1 F
C4018
0.1 F
DURING PLAYBACK
MEASURED WITH THE DIGITAL TESTER
NOTE: THE DC VOLTAGE AT EACH PART WAS
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
MA4 {1}
MA3 {1}
MA5 {1}
MA2 {1}
MA6 {1}
MA1 {1}
MA7 {1}
MA0 {1}
MD15 MD0
MA8 {1}
MA10 {1}
MA9 {1}
MD14 MD1
MA11 {1}
MCS0# {1}
MRAS# {1}
MPCLK {1}
MCAS# {1}
MD13 MD2
MWE# {1}
MDQM {1}
MD8 {1}
MD12 MD3
MD7 {1}
MD9 {1}
MD6 {1}
MD10 {1}
MD5 {1}
MD11 {1}
MD11 MD4
MD4 {1}
MD12 {1}
MD3 {1}
MD10 MD5
MD13 {1}
MD2 {1}
MD14 {1}
MD1 {1}
MD15 {1}
MD0 {1}
MD9 MD6
MD8 MD7
MDQM
MDQM MWE#
MPCLK MCAS#
MRAS#
MCS0#
MA9 MA11
MA8 MA10
MA7 MA0
MA6 MA1
MA5 MA2
MA4 MA3
AT+D3.3V {1,4}
DGND {1,3,4}
10
3
(SYSCON PCB)
SDRAM SCHEMATIC DIAGRAM
FROM/TO
MPEG
FROM VIDEO ENCORDER
PCB010
VMX212
W.PHON
K.MURATA SDRAM
3.3
NC
NC
VSS
I/O15
I/O14
VSSQ
I/O13
I/O12
VCCQ
I/O11
I/O10
VSSQ
I/O9
I/O8
VCCQ
NC
DQMU
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VCC VSS
A3
A2
A1
A0
A10
A11
CS
RAS
CAS
WE
DQML
VCCQ
I/O7
I/O6
VSSQ
I/O5
I/O4
VCCQ
I/O3
I/O2
VSSQ
I/O1
I/O0
VCC
3.2
3.2
3.2
3.2
3.2
3.2
3.2
0.9
0
T1
A
7
M2A1
0
0
0.9
0
1.2
1.2
0.5
0.5
0
1.0
0.8
0.9
0.9
0
0.9
0.9
0.8
0.8
0
0.4
0.7
0
0
1.5
0.1
0.3
0.2
0.6
0
3.1
3.1
3.0
2.9
0.6
2.2
0.6
0.5
0.5
0.5
0.6
0.6
MPJ2