Hitachi CP-SX5500W, Service Manual

Page: 25 / 64

25
CP-SX5500W
7. Block diagram
Panel(R)
0.9
”SXGA
1365
x
1
024
Panel(G)
0.9
”SXGA
1365
x
1
024
Panel(B)
0.9
”SXGA
1365
x
1
024
S/H IC S/H IC S/H IC S/H IC S/H IC S/H IC
Buffer
+C.Unif
IC
TG(FPGA)
Buffer
16M SDRAM
x
4
Frame rate
Processor IC
Image Processor IC
PLL
X
’tal
RGB(ODD)
RGB(EVEN)
RGB(ODD)
RGB(EVEN)
8bit x3
R(ODD)
R(EVEN)
10bit
95MHz
A /
D+PLL
G(ODD
)
G(EVEN)
B(ODD)
B(EVEN)
8bit x3
MCLK
DCLK
TMDS
"
Progressive Control
16M SDRAM
x
2
MCLK
Video Deco.
3Line
C.Video
S.Video Component
DCLK
RGB(ODD) RGB(EVEN)
Select
RGB1
IN
RGB2
IN
IIC
-2
RGB
O
UT
143MHz
133MHz
SUB
C
PU
IIC
RGB PWB
PLL
X
’tal
PLL
X
’tal
H,
V
,HCLK
H,
V
,CLK
H,
V
,CLK
DVI IN
YUV Processor
DC
POWER
SUPPLY
PWB
AC
IN
LAMP
POWER
SUPPLY
PWB
FAN
PWB
FAN
FAN
Power Regulator
FAN
VIDEO PWB
Temp
S
ensor
LAMP
MAIN PWB