Harman Kardon HS100/230, Service Manual

Page: 52 / 68

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Power_on
Configeration
DEBUG PORT
Q7 SCART OUT Y/VBS AND R/C SELECT
Q0 RESERVE
Q6 OPTICAL/OAXIAL INPUT SELET
Q4,Q5 Audio INPUT (AUX,SCART,TUNER)SELECT
Q1-Q3 FS0,FS1 AND RGB_SEL FOR SCART OUT
1239C-PV1
3.43
H S 1 0 0 M A I N B O A R D 0 5 0 7 2 5
C
4
2 4
Tuesday, November 22, 2005
Title
Size Document Number R e v
Date: Sheet o f
Harman Kardon, Northri dge, California 91329, USA
VD1
M1_D1 M1_D7
M2_A1
M1_D5
M2_A8
M1_A7
M2_A7
M2_A0
M 2 _ D 3
AVID0
M1_D9
SDIOWR
M2_A4
M 2 _ D 2
M1_A11 M1_D8
M 2 _ D 1
SDMACK
M1_D12 M1_A9 M1_D13
M1_D2
M1_A1
SCS0
M2_A11
M1_A10
M 2 _ D 6
M2_A10
M1_A3 M1_D15 M1_A4 M1_A0
M2_A9
M1_A8
AVID1
M 2 _ D 7
M 2 _ D 0
M2_A5
M1_A5 M1_D10
M2_A3
M1_D0
M2_A[0..11]
M1_A6
M2_A6
SDMARQ/dack
M1_D3
M 2 _ D 5
M2_A2
Core_1.8
SCS1
SIRQ14
M2_D[0..7]
M1_D14 M1_A2
M 2 _ D 4
M1_D6 M1_D4
M1_D11
SDA2
VD7
ADATA3
M2_A19
M2_A18
SDA[0..2]
VCC3.3Q1
M2_A20
AIN_SEL0
AIN_SEL1
ADATA2
ADATA0
ADATA1
VCC1.8Q
RESET_n
CSEL
Core_3.3
VCC3.3Q0
SDD10 SDD12
SDD3
SDD15
SDD6 SDD1 SDD0 SDD7 SDD2 SDD8
SDD14 SDD13
SDD4 SDD9
SDD[0..15]
SDD11
SDD5
SDA0 SDA1
VD4
VD4
T D O
T C K
T D I
TMS
SDIOR
A L R C K
T W A R N
P W R D N
AMUTE
CLOCK/SCL
ADATA2
DATA/SDA
ASCLK
ADATA1
ADATA0
A M C L K
DI/SDA
CL/SCL
AMUTE
VD5
VD6
M1_DQM1 M1_DQM0 M1_CLKO M1_BA0 M1_BA1
M1_WE_n
M1_CAS_n M1_RAS_n M1_SCS_n
M1_A[0..11] M1_D[0..15]
P W R D N
T W A R N
RESET_n
M2_A[0..11]
M2_D[0..7]
M2_A19
M2_A18
M2_RAS_n
M2_CAS_n
M2_WE_n
M2_BA1
M2_BA0
M2_DQM1
M2_DQM0
M2_EOE_n
CSEL
M2_A20
TUNERON/OFF
CSEL
DI/SDA
REMOTE
ADATA0
ADATA1
ADATA2
V F D _ C E
RESET_n
CL/SCL
DI/SDA
A M C L K
ASCLK
A L R C K
ADATA0
ADATA1
ADATA2
P W R D N
T W A R N
DI/SDA
P R E _ R E
V F D _ C E
REMOTE
M C U - C L K
CL/SCL
VCC1.8
AV1 AV0
Core_3.3
AV1
V D D _ D A C 0
VCC1.8
V D D _ D A C 1
Core_1.8
AV0
VCC1.8
Core_1.8
Core_3.3
VCC3.3
VCC3.3
D G N D
D G N D
D G N D
D G N D D G N D
D G N D D G N D
D G N D
D G N D
D G N D
D G N D
D G N D
D G N D
D G N D
D 5 V C C
D G N D
Core_1.8
D G N D D G N D
D G N D
D G N D D G N D
D G N D
AVGND
VCC3.3
+ 5 V
VCC3.3
VCC3.3
D 5 V C C
D 5 V C C
D 5 V
D 5 V
CB40 1 0 4
+
EC2
1 0 0 U / 1 6 V
CB41
1 0 4
CB33
1 0 4
CB22
1 0 4
CB39
1 0 4
RR1
10k
CB46
1 0 4
R 2 5
open(OPT)
+
EC7
2 2 0 U / 1 6 V
R 1 2
1 8 7
R 2 1 1 0 K
AR2
4.7K
CB18
1 0 4
CB25
1 0 4
+
EC1
1 0 0 U / 1 6 V
C 5 5
NA
C 2 2
22PF
CB21
1 0 4
3 J 3
PH-10A-2.0mm
1
2
3
4
5
6
7
8
9
M C U - C L K
SCL
S D A
V F D C E
IR
RESET
AMUTE
G N D
+ 5 V
CB19
1 0 4
CB35
1 0 4
+ EC3
2 2 0 U / 1 6 V
CB42
1 0 4
CB38 1 0 4
C 5 7
NA
R 2 2 1 0 K
R 2 3
1 0 K
R2
10k
CB31
1 0 4
R3
10k
R 9
7 5 R
R 3 4
1 0 k
CB27
1 0 4
Y1
27M
R 1 8
2.7K
CB23
1 0 4
C 2 3
22PF
R 3 8
1 0 k
CB37
1 0 4
R 1 1 1 8 7
R 3 6
1 0 k
R 3 5
1 0 k
CB36
1 0 4
CB48
1 0 4
L 3 FB
L 4
FB
L 5 FB
CB28
1 0 4
R 1 7
2.7K
CB45
1 0 4
Memory #1
Memory
#2
Audio
GPIO,Video
IDE / DVD_DSP
gpio0
gpio1
gpio2
gpio3
gpio4
gpio5
gpio6
gpio7
AML3370
3.3V Core 1.8V Core GND
1.8V
GND
GND
Power
TEST
CLOCKS
MPEG AUDIO VIDEO
PLL PLL PLL
GND
3.3V
3.3V
GND
GND
1.8V
GND
1.8V
U4
55 56 57 58 59 60 63 64 75 74 73 72 71 70 69 68 96 97 98 99 88 85 84 83 82 81 95 89 90 91 94 92 100 76 77
1 4 3
1 5 1
1 5 0
1 4 9
1 4 8
1 4 5
1 4 4
1 4 2
1 1 4
1 2 4
1 2 2
1 1 5
1 1 6
1 1 9
1 1 7
1 4 1
1 3 9
1 3 5
1 3 3
1 3 1
1 2 9
1 2 7
1 2 3
1 2 8
1 3 0
1 3 8
1 3 2
1 1 8
1 1 2
1 1 1
1 1 0
1 0 9
1 4 0
1 3 4
1 0 6
1 1 3
1 0 7
14 13 12 11 10 15 185 54 16 182 170 169 168 155 156 167 171 187 188 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 177 178 180 174 179 176 175 172 173
80 147 126 105 66 18 153 136 120 208 186 189 1 17 65 79 104 125 146 183 62 87 137 121 103 190 154 86 61 102
5 2
6
5
4
3
7
8
5 1
2 0
3 1
3 2
3 0
184 53 181 163 165 157 158 160 161 162 164 159
1 9
1 5 2
9
2
78 93 67 101
1 0 8
166
2 2
2 5
2 8
2 3
2 6
2 9
3 3
3 5
3 4
2 7
2 4
2 1
4 4
4 7
5 0
4 1
4 0
3 9
3 8
3 6
4 9
4 6
4 3
3 7
4 8
4 5
4 2
M1_D0 M1_D1 M1_D2 M1_D3 M1_D4 M1_D5 M1_D6 M1_D7 M1_D8 M1_D9
M1_D10 M1_D11 M1_D12 M1_D13 M1_D14 M1_D15
M1_A0 M1_A1 M1_A2 M1_A3 M1_A4 M1_A5 M1_A6 M1_A7 M1_A8 M1_A9
M1_A10
M1_WE_n
M1_CAS_n M1_RAS_n
M1_BA1
M1_SCS_n M1_ECS_n
M1_DQM1
M1_CLKO
M 2 _ D 0
M 2 _ D 1
M 2 _ D 2
M 2 _ D 3
M 2 _ D 4
M 2 _ D 5
M 2 _ D 6
M 2 _ D 7
M 2 _ D 8
M 2 _ D 9
M 2 _ D 1 0
M 2 _ D 1 1
M 2 _ D 1 2
M 2 _ D 1 3
M 2 _ D 1 4
M2_A0
M2_A1
M2_A2
M2_A3
M2_A4
M2_A5
M2_A6
M2_A7
M2_A8
M2_A9
M2_A10
M2_A11
M2_WE_n
M2_CAS_n
M2_RAS_n
M2_SCS_n
M2_BA0
M2_ECS_n
M2_EOE_n
M2_CLKO
M2_DQM0
M2_DQM1
ADATA0 ADATA1 ADATA2 ADATA3 AOCLK ALRCLK AICLK_XOUT IEC958 AMCLK SCLK_XOUT RESET_n TEST_n TRST_n TDI TMS TCK TDO DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 DA0 DA1 DA2 DIOR_n/sos DIOW_n/err DIORDY/stb DMARQ/dack DMACK_n CS0_n/req CS1_n CSEL IRQ14
VDD_18 VDD_18 VDD_18 VDD_18 VDD_18 VDD_18 VSS_33 VSS_33 VSS_33 VDD_18 VDD_18 VSS_33 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VDD_33 VDD_33 VDD_33 VDD_33 VDD_33 VDD_33 VDD_33 VSS_33 VSS_33 VSS_33
V D D _ D A C 1
VD3
VD4
VD5
VD6
VD2
VD1
VSS_DAC1
VSS_DAC0
RSET0
VREF0_OUT
COMP0
AICLK_XIN ADC SCLK_XIN DVDD_PLL1 VSS_PLL2 AVDD_PLL0 AVSS_PLL0 DVDD_PLL0 AVDD_PLL1 VSS_PLL1 AVDD_PLL2 DVSS_PLL0
V D D _ D A C 0
M 2 _ D 1 5
VD0
VD7
M1_A11 MA_BA0
M1_DQM0
M1_EOE_n
M2_BA1
DVDD_PLL2
A V D D _ D A C 0 _ B
AVDD_DAC0_G
AVDD_DAC0_R
AVSS_DAC0_B
AVSS_DAC0_G
AVSS_DAC0_R
VRET0_IN
AVDD_DAC0
AVSS_DAC0
AVID0
AVID1
AVID2
AVID3
AVID4
AVID5
COMP1
RSET1
VREF1_OUT
VRET1_IN
AVDD_DAC1
A V D D _ D A C 1 _ B
AVDD_DAC1_G
AVDD_DAC1_R
AVSS_DAC1
AVSS_DAC1_B
AVSS_DAC1_G
AVSS_DAC1_R
R 1 9
2.7K
CB62
1 0 4
CB26
1 0 4
U 1 5
2 4 C 6 4
1
2
3
4
5
6
7
8
N C
N C
N C
G N D
S D A
SCL
W P
V C C
C O N 1
DAMP CON/16P,1.0mm
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
CB34
1 0 4
CB30
1 0 4
R 2 0
2.7K
CB32
1 0 4
CB43
1 0 4
R 2 4
1 0 K
C 9
NA
+
EC5
2 2 0 U / 1 6 V
CB47
1 0 4
FB34 FB
U 5
7 4 V H C 1 6 4
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
A
B
Q 0
Q 1
Q 2
Q 3
G N D
C P
MR
Q 4
Q 5
Q 6
Q 7
V C C
FB26 FB
L 2
FB
FB31 FB
C O N 2
ARC JTAG
1
2
3
4
5
6
+3.3V
G N D
TMS
T D I
T C K
T D O
L 1
FB
FB32 FB
C 2 1
10PF
FB33 FB
C 1 0
NA
CB44
1 0 4
CB17
1 0 4
CB29
1 0 4
RR2
10k
R 1 6
1 0 K
CB20
1 0 4
R27
10k
L 6 FB
CB108
1 0 4
R 2 8
1 0 0 K
L 8
FB
C 2 0
47PF
C 5 0
NA
CB24
1 0 4
SCS0
SDMARQ
SDIOWR
SDD[0..15]
SCS1
SDIOR
SIRQ14
SDMACK
SDA[0..2]
DETECT
ADC_DAT
V _ Y
V_C
B/Cb/Pb
G/Y/Y
R/Cr/Pr
TUNER_CE
DAC_ML
R C L K
SW2
AIN_SEL0
AIN_SEL1
RGB_SWITCH
TVFORMAT1
TVFORMAT0
D O
R D S C L K
HW_MUTE
ADATA3
T D I
ASCLK
A L R C K
A M C L K
VD4
V F D C L K
CL/SCL
DI/SDA
AMUTE
V_COMP
AMUTE
Harman Consumer Group Schematics HS100
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