Harman Kardon AVR 247, Service Manual

Page: 97 / 206

3
3600A–DFLASH–11/05
AT26DF081A [Preliminary]
3. Block Diagram
4. Memory Array
To provide the greatest flexibility, the memory array of the AT26DF081A can be erased in four
levels of granularity including a full chip erase. In addition, the array has been divided into phys-
ical sectors of various sizes, of which each sector can be individually protected from program
and erase operations. The sizes of the physical sectors are optimized for both code and data
storage applications, allowing both code and data segments to reside in their own isolated
regions. The
Figure 4-1 on page 4 illustrates the breakdown of each erase level as well as the
breakdown of each physical sector.
Figure 2-1. 8-SOIC Top View
1
2
3
4
8
7
6
5
C S
S O
WP
GND
VCC
HOLD
S CK
S I
FLA S H
MEMORY
ARRAY
Y-GATING
C S
S CK
S O
S I
Y-DECODER
ADDRE
SS
LA
TCH
X-DECODER
I/O BUFFER S
AND LATCHE S
CONTROL AND
PROTECTION LOGIC
S RAM
DATA BUFFER
WP
INTERFACE
CONTROL
AND
LOGIC
97
AVR247
harman/kardon