Harman Kardon AVR 1650, Service Manual

Page: 97 / 159

ESMT
M12L16161A
Elite Semiconductor Memory Technology Inc. Publication Date : May. 2005
Revision : 2.4 3/30
FUNCTIONAL BLOCK DIAGRAM
PIN FUNCTION DESCRIPTION
Pin Name Input Function
CLK System Clock Active on the positive going edge to sample all inputs.
CS
Chip Select
Disables or enables device operation by masking or enabling all inputs except
CLK, CKE and L(U)DQM.
CKE Clock Enable
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.
A0 ~ A10/AP Address
Row / column addresses are multiplexed on the same pins.
Row address : RA0 ~ RA10, column address : CA0 ~ CA7
BA Bank Select Address
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
RAS
Row Address Strobe
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
CAS
Column Address Strobe
Latches column addresses on the positive going edge of the CLK with
CAS low.
Enables column access.
WE
Write Enable
Enables write operation and row precharge.
Latches data in starting from CAS , WE active.
L(U)DQM Data Input / Output Mask
Makes data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.
Bank Select
Data Input Register
Column Decoder
Latency & Burst Length
Programming Register
512K x 16
512K x 16
Timing Register
CLK CKE
CS RAS CAS WE
L(U)DQM
LDQM
LWCBR
DQi
LDQM
LWE
LRAS LCBR
LWE
LCAS
CLK
ADD
LCKE
Ad
dress R
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gi
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R
o
w
B
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ff
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r
Ref
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s
h Cou
nt
e
r
Ro
w
D
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cod
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Se
n
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A
M
P
Co
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r
LR
A
S
LCBR
I/
O
Con
tr
ol
Outp
ut B
u
ff
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r
AVR 1650 harman/kardon
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