©1999 Hamtronics, Inc.; Hilton NY; USA. All rights reserved. Hamtronics is a registered trademark. Revised: 1/28/00
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tions.
The preamplifier has automatic
gain control, with the at-
tack/release time constants set by
R10/C12. The 20 dB or so of gain
compression range on the preamp
compensates for variations in voice
characteristics and levels of speech
volume.
The next stage of signal condi-
tioning is done by the input filter.
Although analog storage of the in-
stantaneous voice level does not re-
quire an a-d converter, digital
sampling is done in the time do-
main; so an anti-aliasing filter is
required to limit any speech compo-
nents to frequencies less than one-
half the sampling rate. This is a
primary requirement of any digital
audio processing technology.
The processed waveform is then
passed into the analog transceivers
to be written into the analog storage
array. Because the storage process
takes longer than the sampling pe-
riod, several samples are written at
one time, and then another group of
samples is written, and so on. The
eeprom cells work similar to digital
eeproms you are familiar with, but
these eeprom cells actually store an
analog voltage and not a digital sig-
nal (0's and 1's). The recording is
non-volatile; it has a useful life of at
least ten years even if no power is
applied during part or all of that
time.
Audio Playback Circuits.
During playback, the recorded
analog voltages are sequentially
read from the storage array, thereby
reconstructing the sampled wave-
form. The smoothing filter on the
output path removes the sampling
frequency component and the origi-
nal waveform is restored. The out-
put of the smoothing filter is con-
nected through an analog multi-
plexer into the output power
amplifier.
Although not normally used in
the DVR-3, two output pins (14 &
15) can provide direct speaker drive
capability of about 50 mW rms (100
mW peak) into a 16
Ω
speaker
enough to be clearly heard from the
other side of a normal sized room.
An external audio signal can also be
applied to the speaker driver
through the AUX IN at pin 11.
Audio for the repeater is derived
from one line of the speaker driver.
This audio is coupled through poten-
tiometer R8, which allows for level
adjustment, and R9/C10, which
provides the proper output imped-
ance and dc blocking.
U1 Control Circuits.
There are four control lines used
on the ic, plus a test line which we
do not use.
The PD (power down) line at pin
24, which is normally held low dur-
ing record or playback, does two
things when raised high. First, it
resets the internal address pointer
to zero. Second, it puts the ic in a
power down state in which it draws
very little current (for idling).
The P/R line puts the chip in a
playback mode when high and rec-
ord mode when low.
The CE (chip enable) line is what
actually starts each record or play-
back cycle. It is held low to make
the chip run.
The EOM line puts out a low sig-
nal under two conditions. First,
when the playback mode reaches
the end of a recording on the chip,
the EOM line puts out a ground
pulse of about 25 mSec length. Sec-
ond, if the chip runs until the very
end of its 20 second recording time,
the EOM line goes low and stays low
until the chip receives a PD signal
to reset it.
S2 Record Switch Circuit.
Now that you know the functions
of the control pins on the U1 chip,
we can discuss how the external
control circuits operate.
Refer to the
schematic diagram.
In order to record a message, S2
(or an external switch performing
the same function) is depressed.
The switch works in conjunction
with pull-up resistor R2 to apply ei-
ther +5Vdc or ground to play-
back/record pin 27 on the U1 chip.
If S2 is not depressed, R2 pulls the
P/R line high and the ic is held in
the playback mode. When recording
is necessary, S2 is depressed, and
pin 27 is held low, in the record
mode.
In order for the ic to "run", i.e.,
for the clock circuits to step through
a message, S1 (or an external
switch performing the same func-
tion) is depressed. This switch
works in conjunction with pull-up
resistor R1 to apply 5Vdc or
ground to power down pin 24 and
chip enable pin 23 on the U1 chip.
With S1 depressed, ground is ap-
plied to these pins, which causes
the ic to either playback or record,
depending on whether S2 is also de-
pressed. With S1 released, the rec-
ord or playback action stops, and the
high on power down pin 24 makes
the ic reset all its circuits for the
start of a new cycle, in particular,
this is what sets the address back
to the starting address.
At the end of the recorded mes-
sage, releasing the two switches
stops the record cycle and causes
the chip's internal control circuitry
to put an "end of message" marker
at the point in memory where the
message ends. On playback, this
marker controls where playback
stops.
Q1 Playback Latch Circuit.
Pull-up resistor R1 normally
holds the PD and CE lines high. To
playback a message, these lines are
momentarily brought low, either by
S1 or by the playback control (voice
id trip) output of the COR-5 control
board, which is the brown wire.
This starts the playback cycle.
During playback, a positive volt-
age appears on the AF /-
lines, which are differential outputs
from pins 14 & 15 of U1. Actually,
both lines have a positive voltage on
them; the +/- signs refer to the
phase of the output, not the dc po-
larity. The positive voltage on these
lines turns on Q1 through R4 and
R5 and holds Q1 on. Q1 thus
latches the ground on the PD and
CE lines.
At the end of the message, a
short ground pulse appears at the
pin 25 EOM (end of message) line.
This ground is applied to the base of
Q1 through CR2, shunting the volt-
age from R4 and R5, and thereby
turning off Q1. This stops the play-
back, resets the internal address
pointer to zero, and powers down
the U1 chip.
