![background image](http://html1.mh-extra.com/html/haier/htvf20r72/htvf20r72_service-manual_3319970035.webp)
The CVBS signals produced by OM8377 pin 40 will be amplified and sent to N701 pin 19 via V821 and then
processed by software and hardware inside CPU. The decoded CCD signales will be transmitted to OM8377 pin 14,
15 and 16 via CPU pin 22, 23 and 24.
(8) V-CHIP performance
Performance of V-CHIP is mainly completed by CPU. The CPU receives grade signals from the IC bus and
executes relative performances and shields those programs of relative grade.
4. Electric diagram (see attached page)
IV. Integrated circuit reference
1. All integrated circuit voltages
Following voltage data is achieved while the TV set is turned on, and the electric resistance is achieved when the
TV set is turned off. When the status changes, the data should also be changed. So these data are used as references.
2. N101 OM8377
PIN
Leads Function
Voltage (V)
PIN
Leads Function
Voltage (V)
1
Video output
2.23
28
Reciprocal pulse input
1.06
2
FM filter output
2.23
29
Reference current
1.69
3
AGC filter
2.22
30
Clock output
0.002
4 Hi
AGC
output 2.59
31
N.C.
0.002
5
MF input
1.30
32
OSD gain control
3.05
6 MF
input 2.83
33 Earth
0
7
Earth
2.83
34
X ray protection
0.06
8
Power
0
35
ACC KILLER FILTER
0.39
9 FM
filter 4.94
36
CHROMA
AFC-F
3.49
10 AFT
output
1.90
37
CW
:
3.58MHz OUT
0.54
11 Data
bus
2.77
38
2.87
12
Clock bus
4.85
39
Auto color filter
3.2
13
Beam input
4.76
40
Video output option
2.43
14 R
input
3.92
41 Earth
0
Circuit Explanation
Summary of Contents for HTVF20R72
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Page 26: ...PCB Diagram 3 PCB Diagram ...