Grundig STR 110 microSAT Service Manual Download Page 15

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GRUNDIG Service

STR 110 microSAT

Platinenabbildungen und Schaltpläne / Layout of the PCBs and Circuit Diagrams

GRUNDIG Service

STR 110 microSAT

Platinenabbildungen und Schaltpläne / Layout of the PCBs and Circuit Diagrams

2 - 6

2. Microcomputer Operation

This system contains the mask-programmed microcomputer (CIC1400)
and the NVM-type EPROM CIC1420 for the programme data like
channel table, station ident, deviation, and so on. The exchange of data
between the

P and IC1100, IC1330, and the SAT Tuner is carried out

on the I

C-bus.

2.1 Pin Configuration of Processor CIC1400
Pin 30:
Power-on reset for the processor, generated by IC1402. The pro-
gramme sequence will not start before all supplies of the receiver have
built up.
Pin 28, 29:
The system clock is generated by an oscillator whose frequency is
determined by Q1402 (4MHz). A proportion of this signal is fed through
CC1025 and CR1025 and is used to provide clock for IC1100.
Pin 59:
The IR input is active LOW.
Pin 60:
LNC_PG (Power Good) is used to detect the presence of a short-
circuit on the LNC. The LNC Power is switched off via U

LNC OFF

and

IC1760 if the LNC current is < 350mA.
Pin 61:
Data output to the Remote Cinch socket, e. g. for data link transfer.
Pin 62:
VDR-output to the display on the SAT Mouse.
Pin 63:
Switches the 22kHz frequency ,IC1100-(29), to the "LNC Power"
supply to drive the LNC's. This 22kHz output signal can also be pulse-
modulated with a DiSEqC protocol.
Pin 64:
Switching voltage U

14/18V

to select horizontal or vertical polarity on

voltage-controlled polarotors; "High" = horizontal.
Pin1:
Switching voltage U

LNC OFF

to switch off the LNC supply.

Pin 2:
Switching voltage U

Standby

to switch off the +12V and +5V supplies.

Pin 13:
Data input from the Remote Cinch socket for remote control (e. g.
Timer operation) by a video recorder.
Pin14:
Connection to local "TASTER UP" key in the SAT Mouse.
Pin 19:
Scans whether there is a sync signal fed out from the sync signal
detector circuit IC1330. If the signal is too low or poor the

P switches

to the internal synchronising signal and the screen background be-
comes blue. With the "green" key on the local keyboard it is possible
to change the background to green.
Pin 21:
AV switching voltage input for evaluation of the switching voltage on pin
8 of the decoder socket. If "AV IN1" is at high level the video signal is
fed back to the receiver via the connected descrambler.
Pin 22:
AV switching voltage input for evaluation of the switching voltage on pin
8 of the VCR socket. At high level "AV IN 2" the VCR signal is looped
through to the TV receiver (matrix).
Pin 23:
Connection to the local "DOWN" key in der SAT Mouse.
Pin 24:
Control voltage U

AFC

for SAT Tuner frequency control.

Pin 48, 49:
System data and clock lead to control the tuner, IC1100,IC1330,
CIC1420 (I

C-bus).

Pin 37:
Enable signal CS

OSD

(Chip Select OSD) for the OSD Controller IC1330.

Pin 38:
RGB/TV switching voltage for changing over the Scart sockets (ma-
trix). When the RGB/TV switching voltage is at "High", CT1270,
CT1226 switch the TV receiver to RGB mode.
Pin 39:
AV 3 switching voltage to pin 8 of the TV-socket.
Pin 40/41:
Serial clock and data lead to drive clock CIC1120

2.2 Non Volatile Memory
NVM CIC1420 is a serial EEPROM and contains all factory and user
programmable data to configure the receiver (channel table, deviation,
polarity etc.).

2.3 Clock-IC CIC1120
Clock-IC1120 oscillates at a clock fequency of 32.768kHz under
control of quartz Q1121. In the case of a power failure a Lithium battery
is provided with a back-up capacity of approx. 6-7 years.

3. Tuner

All functions within the tuner are controlled from IC1400 via I

C Bus.

The IF signals from the LNC, in the range 900MHz to 2150MHz, are
supplied to the aerial input.
The LNC-input is AC-coupled into a variable amplifier whose gain is
adjusted automatically by the AGC to ensure a constant level at the
input to the FM Demodulator. At the output contact 4 of the tuner the
baseband signal is available together with the 25Hz energy dispersal
signal.
To improve the picture quality resulting from a noisy transmitter signal
a "threshold" circuit can be activated in the tuner via the menu.

4. Audio Path

Note to the block circuit diagram: Where two pin numbers are given two
circuits exist, one for each stereo channel. The first number is for the
Right channel.

Audio Demodulator Block Diagram

The FM audio demodulator is of the Phase Locked Loop (PLL) type.

FM signals in the tuner Baseband Video signal are filtered by CC1014,
L1014, CC1016, L1016, L1019, CC1017, CR1017, L1017 which
removes unwanted Video components from FM in.

It is important that the drive level of the signals being demodulated is
fixed so that the output amplitude from the demodulator can be
predicted. To help achieve this the input signal passes through a gain
controlled amplifier G1, whose gain is set by one of two level detectors.
When a signal is first selected Level Detector 1, which senses the
combined FM signal amplitude, is used to set G1 to an approximately
correct gain. Once PLL lock has been reached Level Detector 2 is used
which accurately monitors the actual signal level within the working PLL.

When a new audio carrier is being selected the PLL must be tuned to the new
frequency. To do this S1 is closed and the Voltage Controlled Oscillator
(VCO) is adjusted by means of the Frequency Synthesiser. The VCO
frequency is read by the Frequency Counter. Once the VCO is on frequency
S1 is opened and the VCO locks onto the incoming carrier of the same
frequency. The control loop feedback signal at the input of G2 carries the FM
modulation. The gain of G2 can be controlled to handle different FM
deviations. Loop stability is maintained by the PLL filter.
Control of all functions in the Demodulator is via the I

C bus (SDA, SCL)

from IC1400.
Note: Where two pin numbers are given two circuits exist, one for each
stereo channel. The first number is for the Right channel.

AMPLOCK

V/I

VCO

Level

Detector 1

Level

Detector 2

Frequen cy

Counter

Frequen cy

Synt

hesizer

To Audio
Processing

AGC

FM in

C-PUMP

IC1100 STV0056A

SDA

SCL

{

C Bus

46 ,41

49,38

42,26

47,39

PLL

Filter

PA L

Pre-emphasis

Low Pass

Filter

Group

Delay

Corrector

Clamp

PAL

BASEBAND

NORMAL

DECODER

VCR

-1

Video Gain

Baseband Video

From Tuner

From Decod

From VCR SCART

Black Level

Adjust

To Decoder

On Screen

Display

Sync Separator

Sync Detector

VCR

To TV SCART

To VCR

Invert

NO_SYNC

PK_SYNC

To CIC1400

{

-6dB

Video Matrix

C Bus

}

IC1100

STV0056A

OSD_CS

OSD_SCK

OSD_SDA

OSD_RESET

OSD Bus from

CIC1400

SCART

Audio Processing Block Diagram

4.1 Noise Reduction System (NRS)
The NRS consists of a peak level detector and a controlled low pass
filter. Audio for each channel to its peak detector is band limited by an
external band-pass filter, and centred on the transistors CT1073,
CT1081.

The output of each peak detector is a voltage stored in its NRS time
constant. This is a dc level which will vary with the amplitude of the
audio channel signal and is used to control the frequency response of
its NRS filter via a variable transconductance amplifier.

Switch S3 is used to select the NRS system.

4.2 Passive Deemphasis
S4 is used to select the type of passive deemphasis that is applied to
each audio channel. The options are set by external networks and are
J17, and 75

S. 50

S is obtained by adding an internal resistor in

parallel with the 75

S network.

For PANDA operation NRS and 75

S are used together.

5. Video Noise Filter

Baseband video from the tuner is passed through a 10MHz low-pass
filer to remove unwanted noise before use by the Video Processor and
Audio Demodulator IC 1100.

6. Video Processing

6.1 Video Gain Control in IC1100
Baseband Video from the Tuner section is ac coupled into a controlled
amplifier whose gain can be set to give the desired Video amplitude.

6.2 Video Inverter
The polarity of the video signal can be set by the invert switch so that,
for instance, C band reception can be achieved.

After the invert selector switch this signal forms the baseband input to
the Video Matrix.

6.3 PAL Deemphasis
The baseband signal is applied to the non-inverting input of an
amplifier which has a PAL pre-emphasis network in its negative
feedback loop. The output of this amplifier is a PAL de-emphasised
signal which is attenuated by 6dB to make it level compatible, and
forms the PAL input to the Video sockets (matrix).

After the deemphasis the PAL signal is band limited by the 5MHz Low-
pass Filter, followed by a Group Delay Corrector to compensate for
distortions in the filter and ac coupled into the clamp to remove the
25Hz energy dispersal waveform. This signal is the normal video input
to the Video Matrix.

N RS

Passi v e
A udi o
D e-em phasi s

6dB

28,27

25,24

51,52

2,54

3,53

1,55

33,34

48,40

14,12

6,10

22,21

To
TV

From

To
VCR

SCART

75
u

J1
7

-e

asi
s

-e

asi
s

Peak

D etector

B and-Pass

Fi l ter

ilt
er

DEC

SCART

DEC

From

Vo l

SCL

SD A

{

C B us

IC1100

ST V 00 56A

VCR

SCART

Video Processing Block Diagram

6.4 Audio Video Matrix IC1100
This is a cross wire matrix of switches which can select any one of the
Video sources and make it available to each of the three outputs. In
addition to the three sources described above video is also fed to the
matrix from the TV , VCR and DEC sockets, each signal being clamped
to the same level to avoid switching disturbances. All Video Matrix,
Invert and Video Gain are controlled via I

C-bus. The output signal from

the matrix is sent to the TV, VCR and DEC socket.
Megalogic control is possible via contact 10 of the SCART sockets.
The video levels can be changed with the red key on the remote control
handset.

6.4.1 TV Socket
By a "High" level switching voltage U

AV OUT 3

CIC1400-(39), the 12V

switching voltage is fed through CT1254, CT1250 to the TV Scart
socket, contact 8, and consequently the TV receiver is switched to the
AV mode.
At the same time, the audio signal and video signal are provided on the
VCR socket for recording.

6.4.2 VCR Socket
On VCR playback the switching voltage from the VCR socket-contact 8,
U

AV IN 2

CIC1400-(22) - applies the audio/video signal to the TV socket.

6.4.3 Decoder Socket
On Decoder operation, the switching voltage from the DEC socket -
contact 8, U

AV IN 1

CIC1400-(21), I

C-bus - feeds the descrambled audio/

video signal to the TV socket.
On RGB operation, the RGB switching voltage from the DEC socket -
contact 16 via CT1276, and the switching voltage U

RGB TV

CIC1400-

(38), CT1270, CT1277 - connects the 12V RGB switching voltage to
the TV socket. The TV receiver changes to RGB mode.

7. OSD and Synchronisation

The video signal V

TV OUT

is also used as the feed for the On Screen

Display (OSD) insertion circuit which adds menus and status informa-
tion to the video signal to be displayed on the TV. The sync tips of the
video signal V

TV OUT

are clamped at a predetermined level by CT1350.

The presence of a standard sync is signalled from CI1330-(14) to
CIC1400 via the "EXO SYNC." lead.

In the absence of a valid sync signal, IC1330 is instructed to generate
its own sync signal so that the screen background becomes blue and
the OSD can still be used.

All control of the OSD is effected via the SDA, SCL and CS OSD leads.

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2 - 5

Schaltungsbeschreibung / Circuit Description