Schaltpläne und Druckplattenabbildungen / Circuit Diagrams and Layout of PCBs
MCD 36 / MCD 40
GRUNDIG Service
GRUNDIG Service
Schaltpläne und Druckplattenabbildungen / Circuit Diagrams and Layout of PCBs
MCD 36 / MCD 40
1
10
22
12
13
14
49
51
47
50
63
53
55
57
56
54
DEFI
SLICE
LEVEL
CONTROL
CLV
DIGITAL
SERVO
C1C2 ERROR
DETECTION
CORRECTION
FLAG
PROCESSING
SUB CODE
SEPARATION
Q-CRC
∝
-COM
INTERFACE
SERVO
COMMAND
STANDARD
PORTS
VCO CLOCK
OSCILLATION
CLOCK CONTROL
ADDRESS
GENERATOR
DIGITAL
OUT
DIGITAL
ATTENUATOR
XTAL
TIMING
GENERATOR
4 TIMES OVER SAMPLING
DIGITAL FILTER
MUTE
1bit DAC
L.P.F
SYNC
DETECTION
EFM
DEMODULATION
2kx8BIT
RAM
EFMIN
FSEQ
CLV+
CLV–
V/P
PW
SBCK
SBSY
SFSY
CS
WRQ
SQOUT
CQCK
COIN
RWC
30
31
34
C2F
DOUT
NC
9
6 4
3 5 7
21
2 59 64 11 32 33 62
23
8
EFMO
VVDD
VVSS
PDD
1SET
FR
PCK
TAI
TST11
TEST1
TEST2
TEST3
TEST4
TEST5
VDD
VSS
LC78622ED
36
LVDD
38
35
37
40
42
41
39
43
44
45
52
46
67
60
48
29
28
27
26
25
24
18
58
19
20
17
16
15
LVSS
MUTE L
LCHO
RCHO
MUTE R
RVDD
RVSS
XVDD
XOUT
XIN
FSX
XVSS
4.2M
16M
EFLG
EMPH
CONT5
CONT4
CONT3
CONT2
CONT1
TGL
RES
JP+
JP–
TOFF
TES
HFL
PIN
DESCRIPTION
Defect detect signal (DEF) input terminal.
PLL
Input terminal for testing . Pulldown resistance is self-contained.
Phase comparison output terminal for outer VCO control.
Power supply terminal for self-contained VCO. Normally 0V.
Resistance connecting terminal for PDO output current adjustment.
Earthing terminal for self-contained VCO. Normally 5V.
For VCO range frequency adjustment.
Input terminal for testing. Pulldown resistance is self-contained.
Output terminal for spindle servo control. Accelerates when CLV+ is "H", slows down when CLV- "H".
Output terminal for automatic switchover monitor by rough servo/phase control. "H" causes rough servo, "L" phases control mode.
Input terminal for track detecting signal. Schmidt input.
Input terminal for tracking error signal. Schmidt input.
Output terminal for tracking OFF.
Output terminal for tracking gain switchover, "L" raises gain.
Output terminal for track jump.When JP+ is "H", accelerates at the time of outer track direction jump, or slows down at the time
of inner track direction jump.
Output terminal for synchronous signal detection. When synchronous signal detected from EFM signal and synchronous signal
occurring inside correspond "H".
Earthing terminal for digital system.
Input / output terminal.
Clock monitoring terminal for EFM data playback. At the time of phase lock, 4.3218MHz.
Output terminal for deemphasis monitor. At the time of "H", deemphasis disc is in playback.
C2 Frag output.
Digital Out output terminal.
Input terminal for testing. Pulldown resistance is self-contained.
Input terminal for testing. Pulldown resistance is self-contained.
Not connected
For 1 bit DAC Mute output terminal.
Power supply terminal for L channel.
L channel output terminal.
Earthing terminal for L channel. Normally 0V.
Earthing terminal for R channel. Normally 0V.
R channel output terminal.
Earthing terminal for R channel. Normally 0V.
Mute output terminal.
Connecting terminal for 16.9344MHz crystal oscillator.
Earthing terminal for crystal oscillation. Normally 0V.
Output terminal for synchronous signal of sub-code block.
Terminal for monitoring C1,C2, single, double correction.
Output terminal for sub-code P,Q,R,S,T,U,W.
Output terminal for synchronous signal of sub-code frame. When sub-code is in standby, "= L".
Output terminal for 7.35kHz synchronous signal which is divided frequency from crystal oscillation.
Output terminal for sub-code Q output standby.
Input terminal for read/write control.
Sub-code Q output terminal.
Input terminal for command from micro computer.
Input terminal for command input intake clock,or sub-code offtake clock from SQOUT. Schmidt input.
Chip reset input terminal. When power is supplied, changeover to "L" once.
Input terminal for testing. Open (Normally "L" output).
16.9344MHz output terminal. But outputs 33.8688MHz, only in case of quadruple speed playback mode.
4.2336MHz output terminal.
Input terminal for testing. Pulldown resistance is self-contained.
Chip select input terminal. Pulldown resistance is self-contained.
Input terminal for testing. Pulldown resistance is self-contained.
Input terminal for sub-code readout clock. Schmidt input.
PORT
NAME
DEFI
TAI
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
TEST2
CLV+
CLV-
V/P
HFL
TES
TOFF
TGL
JP+
JP-
PCK
FSEQ
VDD
CONT1
CONT2
CONT3
CONT4
CONT5
EMPH
C2F
DOUT
TEST3
TEST4
NC
MUTEL
LVDD
LCHO
LVSS
RVSS
RCHO
RVDD
MUTER
XVDD
XOUT
XIN
XVSS
SBSY
EFLG
PW
SFSY
SBCK
FSX
WRQ
RWC
SQOUT
COIN
CQCK
RES
TST11
16M
4.2M
TEST5
CS
TEST1
I/O
I
I
O
-
AI
-
AI
-
O
I
I
O
O
O
I
I
O
O
O
O
O
O
-
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
-
O
-
O
-
-
O
-
O
-
O
I
-
O
O
O
O
I
O
O
I
O
I
I
I
O
O
O
I
I
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Power supply terminal for crystal oscillation. Normally 5V.
Earthing terminal for digital system. Normally 0V.
For slice
level control
EFM signal reverse output terminal.
EFM signal input terminal.
LC 78622 ED
LA6393M
VCC
V OUT2
V IN2-
V IN2+
V OUT1
V IN1-
V IN1+
GND
8
7
6
5
1
2
3
4
TA8409F
2
10
1
IN1
V
CC
7
9
8
3
5
V
S
V
REF
OUT1
M
OUT2
GND
IN2
VREF
STANDBY
HEAT
PROTECTION
Start
circuit
Current
limit
Difference
amp
Refer-
ence
voltage
Over
current
protection
Heat protection
OUTPUT
OUTPUT
INTPUT
1
2
3
L78M05T
GND
Output path
2 - 16
2 - 15
