BIOS Setup Information
This setup is very important to keep system stability. If you are not technical
person, do not attempt to change any parameters. The best way is to choose optimal
default setting.
Delay DRAM read latch
Select delay DRAM read latch for timing.
Configre SDRAM Timing by SPD
This option provides DIMM plug-and-play support by Serial Presence Detect
(SPD) mechanism via the System Management Bus (SMBus) interface. You can
disable this option to manage the following four SDRAM timing options by
yourself. In addition, SDRAM operating timings may follow serial presence from
EEPROM content by setting this option to “Enabled”, and all of SDRAM timing
options will be not available and hidden.
DRAM Frequency
PC-100 means the memory bus is running at 100MHz. PC-133 means its bus is
running at 133MHz.
SDRAM CAS# Latency
This option controls the number of SCLKs between the time a read command is
sampled by the SDRAMs and the time the North Bridge, 8601A, samples
correspondent data from the SDRAMs.
Spread Spectrum
This option is for EMI test only.
Memor y Hole
This option allows the end users tospecify the location of a memory hole for memory
space requirement from ISA-bus cards.
USB Controller
This option will enable on-chip USB function to support USB peripheral devices.
3307114 User’s Manual
4-11