Glenayre Document Number: 9110.01002
GL-T8541 PA
09/10/99
THEORY OF OPERATION
t8541
p6.
fdk
Copyright © 1997 Glenayre
Page: 6-13
6.7.6 The Analog Signal Multiplexers
The metering board has two multiplexer chips (U15 and U16). These chips receive the
various PA signals that are to be monitored by the DSP exciter and displayed on its VDT
screen. The multiplexer select lines (SEL 1, SEL 2, and SEL 3) enter the metering board at
J6 pins 13, 6, and 14 respectively. The three lines are inverted in nand gates U12-D, U12-C,
and U12-A respectively. The inverted select lines enter U15 and U16 at pins 11, 10, and 9
respectively.
The switched output of U15, which is analog line D2, appears on J6 pin 9 of the PA/exciter
interface ribbon cable connector. The switched output of U16, which is analog line D1,
appears on J6 pin 1 of the PA/exciter interface ribbon cable connector. The input samples
connected to the two multiplexers appear in Table 6-5.
Table 6-5 Metering Board Multiplex Chip Inputs
Multiplexer
Chip Input
U15 Pin
Input Signal
U16 Pin
Input Signal
0
13
+5 volt supply
13
Driver current
1
14
+7.5 volt supply
14
PA1 current
2
15
+28 volt supply
15
PA2 current
3
12
+34 volt supply
12
PA3 current
4
1
-15 volt supply
1
PA4 current
5
5
PA AGC voltage
5
Forward power
6
2
PA5 current
2
Reflected power
7
4
PA6 current
4
Temperature