GigaDevice Semiconductor GD32 Series, User Manual

Page: 54 / 65

AN050
GD32 USBFS&USBHS Firmware Library User Guide
54
__IO uint32_t pp_ctl = udev -> regs . pr [ pp_num ]-> HCHCTL ;
pp_ctl |= HCHCTL_CEN ;
pp_ctl &= ~ HCHCTL_CDIS ;
udev -> regs . pr [ pp_num ]-> HCHCTL = pp_ctl ;
}
}
break ;
case GRXSTS_PKTSTS_IN_XFER_COMP :
break ;
case GRXSTS_PKTSTS_DATA_TOGGLE_ERR :
count = ( rx_stat & GRSTATRP_BCOUNT ) >> 4U ;
while ( count > 0U ) {
rx_stat = udev -> regs . gr -> GRSTATP ;
count --;
}
break ;
case GRXSTS_PKTSTS_CH_HALTED :
break ;
default :
break ;
}
/* enable the RX status queue level interrupt */
udev -> regs . gr -> GINTEN |= GINTEN_RXFNEIE ;
return 1U ;
}
Data transmitting processing is mainly implemented in below function
static uint32_t usbh_int_txfifoempty ( usb_core_driver * udev , usb_pipe_mode pp_mode )
{
uint8_t pp_num = 0U ;
uint16_t word_count = 0U , len = 0U ;
__IO uint32_t * txfiforeg = 0U , txfifostate = 0U ;
if ( PIPE_NON_PERIOD == pp_mode ) {
txfiforeg = & udev -> regs . gr -> HNPTFQSTAT ;