AN050
GD32 USBFS&USBHS Firmware Library User Guide
51
Figure 6-1. Construct circuit through triode to control VBUS
GND
R37
10K
Ω
R39
470R
R42
22R
R43
22R
PD13
E4 16V/10uF,AVX
GND
1
2
3
Q2
S8550
R46
1M
Ω
C50
50V/4700pF
+5V
USB_VBUS
USB_DM
USB_DP
VBUS
1
DM
2
DP
3
ID
4
GND
5
Shield
6
U
SB
_
Mi
ni
A
B
re
cep
tac
le
CN3
OTG_FS
+U5V
PA9
PA11
PA12
As shown in
Figure 6-1. Construct circuit through triode to control VBUS
, PD13 is
configured to be GPIO open drain mode(OD).
Enable USB VBUS output 5V: PD13 output low voltage(0)
Disable USB VBUS output 5V: PD13 output high voltage(1)
2, control VBUS through logic chip circuit(F450I-EVAL)