28
Rev NR
CHAPTER 5: HARDWARE CONFIGURATION
5.0
Board Layout
The following figure is a drawing of the physical components of the PCIe-SIO4BX2:
J2
P
C
Ie
-S
IO
4
B
X
2
R
E
V
:N
R
G
E
N
E
R
A
L
S
T
A
N
D
A
R
D
S
C
O
R
P
.
(C
)2
0
1
2
P
2
7
1
2
8
D2
D1
USC
USC
PCIe
Bridge
FPGA
J1
RP1
RP7
RP2
RP8
RP3
RP9
RP4
RP10
D4
D3
D7
D6
D5
Figure 5-1: Board Layout – Top
5.1
Board ID Jumper J2
Jumper J2 allows the user to set the Board ID in the Board Status Register (See Section 2.1.3). This is useful to
uniquely identify a board if more than one SIO4BX2 card is in a system. When the Board ID jumper is installed, it
will read ‘1’ in the Board Status Register. The Board Status Register bit will report ‘0’ when the jumper is removed.
Refer to Figure 5-1 for Jumper J2 location.
J2 Jumper
Description
Notes
1 - 2
Board ID 1
Board ID 1 in Board Status Register (D0)
3 - 4
Board ID 2
Board ID 2 in Board Status Register (D1)
5 - 6
Board ID 3
Board ID 3 in Board Status Register (D2)
7 - 8
Board ID 4
Board ID 4 in Board Status Register (D3)