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4-2
Model 340 Telemetry System
Revision A
2006920-001
Theory of Operation: Transmitter Board (No. 2003708-001)
Transmitter Board (No. 2003708-001)
Ultrasound
The operation of the ultrasound circuitry is controlled by a CMOS
programmable logic device (CPLD). This CPLD also contains the active
circuitry used to form a 4.604 MHZ crystal oscillator, which is the main
system clock from which all board logic timing is derived. The fourth
division (1.151 MHZ) is the operating frequency of the ultrasound
transducer. Ultrasound decoding circuitry in the CPLD generates two
gated bursts of the 1.151 MHz clock division: the first is used to drive the
transducer; the second to run the ring demodulator on the receiver. Both
bursts are buffered by an external latch.
The transducer drive circuitry consists of a FET switch, a transformer,
and a filter. The first gated 1.151 MHz burst from the CPLD is used as
the control signal for the gate of the FET switch. The drain of the switch
in turn drives the primary winding of the transformer. This
configuration creates a burst of 1.151 MHz square waves on the primary
winding during each transmit period. The secondary winding of the
transformer is then coupled to the transducer through a series resonant
tank circuit which is used to filter the square waves on the transformer
output. The transformer, while serving as a coupling device, is also used
to provide an impedance match to the transducer.
The receiver pre-amp consists of a cascode amplifier and an input
matching network. The matching network is configured as a resonant “L”
network and converts the low impedance of the transducer to the high
input impedance of the cascode amplifier. The matching network
provides a low-to-high impedance transformation, in addition to
providing approximately 38 dB of voltage gain. The cascode amplifier
combines a dual FET connected in parallel on the input side, with a
bipolar transistor on the output. The parallel connection of the dual FET
is used to increase amplifier gain (transconductance doubles) while
reducing overall amplifier noise (noise adds in quadrature). The output
of the amplifier is tuned with a parallel resonate tank circuit in the
collector of the transistor section. The cascode amplifier gain is
approximately 12 dB.
Summary of Contents for Corometrics 340
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