Avila Network Computer Operating Manual
11 of 25
J1 – INTB
27
GPIO(10) - Mini-PCI Slot
J1 - INTA
J3 - INTB
28
GPIO(11) - Mini-PCI Slot
J3 - INTA
J2 - INTB
29
GPIO(12) – Compact Flash
30
SW Interrupt 0
31
SW Interrupt 1
Interrupt Map
2.4. Digital I/O Mapping
The GW2342 uses the IXP42x Processor digital I/O for controlling and monitoring
the status of various devices. The IXP42x processor includes three 16-bit
registers for configuring, initializing, and using the digital I/O. The output enable
register (GPOER) configures each bit as an input or output. The data output
register (GPOUTR) controls the digital I/O configured as outputs. The input
register (GPINR) reads the digital I/O configured as inputs. See the
Intel IXP4XX
Product Line and IXC1100 Control Plane Processors Developer’s Manual –
Chapter 13.
The digital I/O bit mapping is shown below.
GPIO Bit
Description
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Digital I/O Header (J8 pin 1) input or output
Digital I/O Header (J8 pin 3) input or output
Digital I/O Header (J8 pin 5) input or output
Digital I/O Header (J8 pin 7) input or output
Shared with Status LED output 0=on and 1=off
Digital I/O Header (J8 pin 9) input or output.
Reserved
I2C Bus - SCL
I2C Bus - SDA
Mini-PCI Interrupt - See IRQ Map (Section 2.3)
Mini-PCI Interrupt - See IRQ Map (Section 2.3)
Mini-PCI Interrupt - See IRQ Map (Section 2.3)
Mini-PCI Interrupt - See IRQ Map (Section 2.3)
Compact Flash Interrupt – See IRQ Map (Section 2.3)
PCI Reset input 0 = active and 1=inactive
Reserved for Watchdog Timer Strobe
Reserved
Digital I/O Map
