Fujitsu PRIMERGY RX2560 M2, Operating Manual

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18 Operating Manual
TX2560 M2 / RX2560 M2
Functional overview
High level of availability and data security
When memory data is accessed, 1-bit errors are identified in the main memory
and automatically corrected with the error correcting code (ECC) method. The
patented memory scrubbing function regularly starts up the EDC mechanism,
ensuring continuous data integrity.
The memory modules used support SDDC technology (Chipkill™), which
further increases the effectiveness of memory error monitoring and correction.
Support is likewise provided for hot-spare memory technology, in which a
memory bank is used like a replacement bank. If a memory module fails, the
bank with the defective memory is automatically deactivated and the
replacement bank is activated (provided it has been configured for appropriately
in the BIOS). The deactivated memory bank is no longer used and the faulty
memory module can be replaced at the next opportunity. In order to be able to
use the hot-spare memory function, all occupied memory banks should be
equipped with identical memory modules.
Memory modules can be protected against failure by mirroring (Memory
Mirroring). Memory Mirroring is roughly comparable to RAID level 1 for hard
disk arrays. The basic configuration requires two identical memory modules in
two different banks.
ASR&R (Automatic Server Reconfiguration and Restart) restarts the system in
the event of an error and automatically "hides" the defective system
components.
The PDA (Prefailure Detection and Analysis) technology from Fujitsu analyzes
and monitors all components that are critical for system reliability.
The SAS/SATA RAID controller supports different RAID levels and increase the
availability and data security of the system.