C141-E056-01EN
5 - 73
11) The device shall drive the first word of the data transfer onto DD (15:0). This step may
occur when the device first drives DD (15:0) in step (10).
12) To transfer the first word of data the device shall negate DSTROBE within t
FS
after the
host has negated STOP and asserted HDMARDY-. The device shall negate DSTROBE no
sooner than t
DVS
after driving the first word of data onto DD (15:0).
5.5.3.2 The data in transfer
The following steps shall occur in the order they are listed unless otherwise specifically
allowed (see 5.6.4.3 and 5.6.4.2):
1) The device shall drive a data word onto DD (15:0).
2) The device shall generate a DSTROBE edge to latch the new word no sooner than t
DVS
after changing the state of DD (15:0). The device shall generate a DSTROBE edge no
more frequently than t
CYC
for the selected Ultra DMA Mode. The device shall not
generate two rising or two falling DSTROBE edges more frequently than 2t
CYC
for the
selected Ultra DMA mode.
3) The device shall not change the state of DD (15:0) until at least t
DVH
after generating a
DSTROBE edge to latch the data.
4) The device shall repeat steps (1), (2) and (3) until the data transfer is complete or an Ultra
DMA burst is paused, whichever occurs first.
5.5.3.3 Pausing an Ultra DMA data in burst
The following steps shall occur in the order they are listed unless otherwise specifically
allowed (see 5.6.4.4 and 5.6.4.2 for specific timing requirements).
a) Device pausing an Ultra DMA data in burst
1)
The device shall not pause an Ultra DMA burst until at least one data word of an Ultra
DMA burst has been transferred.
2)
The device shall pause an Ultra DMA burst by not generating DSTROBE edges.
NOTE - The host shall not immediately assert STOP to initiate Ultra DMA burst
termination when the device stops generating STROBE edges. If the device does not
negate DMARQ, in order to initiate ULTRA DMA burst termination, the host shall
negate HDMARDY- and wait t
RP
before asserting STOP.
3)
The device shall resume an Ultra DMA burst by generating a DSTROBE edge.
b) Host pausing an Ultra DMA data in burst
1)
The host shall not pause an Ultra DMA burst until at least one data word of an Ultra
DMA burst has been transferred.
2)
The host shall pause an Ultra DMA burst by negating HDMARDY-.
Summary of Contents for MPC3045AH
Page 1: ...C141 E056 02EN MPC3045AH MPC3065AH DISK DRIVES PRODUCT MANUAL ...
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Page 31: ...C141 E056 01EN 3 2 Figure 3 1 Dimensions ...
Page 45: ...C141 E056 01EN 4 4 Figure 4 2 MPC30xxAH Block diagram ...
Page 51: ...C141 E056 01EN 4 10 Figure 4 4 Read write circuit block diagram ...
Page 53: ...C141 E056 01EN 4 12 Figure 4 6 PR4 signal transfer ...
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