C141-E056-02EN
5 - 54
(29)
FLUSH CACHE (X ‘E7’)
This command is use by the host to request the device to flush the write cache. If the write
cache is to be flushed, all data cached shall be written to the media. The BSY bit shall remain
set to one until all data has been successfully written or an error occurs. The device should
use all error recovery methods available to ensure the data is written successfully. The
flushing of write cache may take several seconds to complete depending upon the amount of
data to be flushed and the success of the operation.
NOTE - This command may take longer than 30 s to complete.
If the command is not supported, the device shall set the ABRT bit to one. An unrecoverable
error encountered during execution of writing data results in the termination of the command
and the error is reported. And the test write cache data is removed.
At command issuance (I/O registers setting contents)
1F7
H
(CM)
X'E7'
1F6
H
(DH)
×
×
×
DV
xx
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(FR)
xx
xx
xx
xx
xx
At command completion (I/O registers contents to be read)
1F7
H
(ST)
Status information
1F6
H
(DH)
×
×
×
DV
xx
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(ER)
xx
xx
xx
xx
Error information
Summary of Contents for MPC3045AH
Page 1: ...C141 E056 02EN MPC3045AH MPC3065AH DISK DRIVES PRODUCT MANUAL ...
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Page 31: ...C141 E056 01EN 3 2 Figure 3 1 Dimensions ...
Page 45: ...C141 E056 01EN 4 4 Figure 4 2 MPC30xxAH Block diagram ...
Page 51: ...C141 E056 01EN 4 10 Figure 4 4 Read write circuit block diagram ...
Page 53: ...C141 E056 01EN 4 12 Figure 4 6 PR4 signal transfer ...
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