D3030 (BX920 S2)
Technical Manual
17
3
Features
3.1
Overview
Processors
–
1 or 2 Intel
®
Xeon
®
processors of the 5500 and 5600 series
–
2 processor sockets LGA1366 for Intel
®
Xeon
®
processors
–
Integrated memory controller (DDR3)
–
32 KB L1 cache (on-die data cache per core)
–
32 KB L1 cache (on-die instruction cache per core)
–
256 KB L2 cache (mid-level per core)
–
Up to 12 MB on chip shared L3 cache (among all cores)
–
2x Intel
®
QuickPath Interconnect with up to 6,4 GT/s in each direction
Main memory
–
9 slots for main memory DDR3 1066 / 1333 single-, dual- or quad-ranked
DIMM memory modules with 2 GB, 4 GB, 8 GB and 16 GB
–
Buffered and unbuffered DIMMs with ECC are supported, mix of memory is
not permitted
–
Maximum 144 GB of memory
–
Minimum 2 GB (1 memory module)
–
Maximum 32 Gbit/s band width (DDR3)
–
CPU0 has 2 DIMM slots for memory rows per channel, CPU1 has 1 DIMM
slot for memory row per channel
–
ECC multiple-bit error detection and single-bit error correction
–
Memory scrubbing functionality
–
Single Device Data Correction (SDDC) function (Chipkill™)
Chips on the system board
–
Intel
®
5500 chipset
–
Intel
®
ICH10 Base
–
2x Intel
®
82575EB dual-port Gigabit Ethernet controller
–
Hard disk controller LSI1064E SAS for 2 SAS hard disks
–
iRMC S2 (integrated Remote Management Controller) with integrated
graphic controller
–
2 MB Flash ROM
–
32Mx16-667 DDR2 SRAM for iRMC S2
–
ADT7462 temperature/system monitoring controller
