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TWR-MPC 5125
TWR-MPC5125 User Manual
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semiconductor
5.4 Memory
5.4.1 DDR2 SDRAM
The dedicated DDR2 memory bus is 32 bits wide, single bank, 200MHz clock
frequency, no ECC. It uses the MPC5125 DDR2 SDRAM controller and is
directly connection to the MPC5125.
5.4.2 NAND FLASH
Dedicated NAND FLASH memory is directly connected to the MPC5125
NFC
NAND flash controller
.
The RTC_CLK_32.768Khz is used by the CPU's internal XTAL_RTC drive
circuitry.
Summary of Contents for TWR-MPC5125
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