Freescale Semiconductor MSC8144E, Reference Manual

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MSC8144E Reference Manual, Rev. 3
15-46 Freescale Semiconductor
PCI
15.2.4.15 Discard Timer Control Register (DTCR)
DTCR configures the discard timer used to put a time limit on PCI delayed read transactions
from non-prefetchable memory. The purpose of the timer is to release the stuck buffers in case of
malfunctioning or disconnected initiators that never return to read the data. In the same way that
prefetchable reads can be discarded whenever the PCI is full and needs to allocate another buffer.
Non-prefetchable delayed reads may not be discarded until the originator actually gets the data.
Table 15-39 shows the DTCR bit fields.
1111_1111_1111_1111_1111 4 KB
Others Reserved
DTCR Discard Timer Control Register Offset 0x1F8
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
EN — PTV
Type R/W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PTV
Type R/W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 15-39. DTCR Field Descriptions
Bits Description Settings
EN
31
Enable
This bit enables the discard timer. 0 Disabled
1 Enabled
—
30–24
Reserved. Write to 0 for future compatibility.
PTV
23–0
Preload Timer Value
This field contains the preload value for the discard timer. PCI delayed
reads from non-prefetchable address space are discarded after
(2
24
– PTV) internal clock cycles if the initiator has not repeated the
transaction. 0xFFFFFF is not valid for PTV. For example, to discard a
delayed completion if the PCI initiator has not repeated the transaction
in 2
15
PCI clocks,
Note: Assuming the internal frequency is twice the PCI frequency,
the PTV should equal 2
24
– 2
16
(0xFF0000).
Table 15-38. Comparison Mask (CM) Values (Continued)
Value Meaning